參數(shù)資料
型號(hào)： MC8610PX1066JB
廠商： Freescale Semiconductor
文件頁數(shù)： 37/96頁
文件大小： 0K
描述： MPU E600 CORE 1066MHZ 783-PBGA
標(biāo)準(zhǔn)包裝： 36
系列： MPC86xx
處理器類型： 32-位 MPC86xx PowerPC
速度： 1.066GHz
電壓： 1V
安裝類型： 表面貼裝
封裝/外殼： 783-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2
Electrical Characteristics
Freescale Semiconductor
42
2.10
DUART
This section describes the DC and AC electrical specifications for the DUART interface of the MPC8610.
2.10.1
DUART DC Electrical Characteristics
Table 32 provides the DC electrical characteristics for the DUART interface.
2.10.2
DUART AC Electrical Specifications
Table 33 provides the AC timing parameters for the DUART interface.
2.11
Fast/Serial Infrared Interfaces (FIRI/SIRI)
The fast/serial infrared interfaces (FIRI/SIRI) implements asynchronous infrared protocols (FIR, MIR, SIR) that are defined by
IrDA (Infrared Data Association). Refer to http://www.IrDA.org for details on FIR and SIR protocols.
2.12
Synchronous Serial Interface (SSI)
This section describes the DC and AC electrical specifications for the SSI interface of the MPC8610.
2.12.1
SSI DC Electrical Characteristics
Table 34 provides SSI DC electrical characteristics.
Table 32. DUART DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
– 0.3
0.8
V
Input current (VIN
1 = 0 V or V
IN = VDD)IIN
—±5
μA
High-level output voltage (OVDD = mn, IOH = –100 μA)
VOH
OVDD – 0.2
—
V
Low-level output voltage (OVDD = min, IOL = 100 μA)
VOL
—0.2
V
Note:
1. The symbol VIN, in this case, represents the OVIN symbol referenced in Table 2 and Table 3.
Table 33. DUART AC Timing Specifications
Parameter
Value
Unit
Notes
Minimum baud rate
Platform clock/1,048,576
baud
1
Maximum baud rate
Platform clock/16
baud
1, 2
Oversample rate
16
—
1, 3
Notes:
1. Guaranteed by design.
2. Actual attainable baud rate will be limited by the latency of interrupt processing.
3. The middle of a start bit is detected as the 8th sampled 0 after the 1-to-0 transition of the start bit. Subsequent bit values are
sampled each 16th sample.
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