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參數(shù)資料
| 型號(hào)： | MC908QF4FJ |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PQFP32 |
| 封裝： | LQFP-32 |
| 文件頁(yè)數(shù)： | 31/196頁(yè) |
| 文件大?。?/td> | 2909K |
| 代理商： | MC908QF4FJ |
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System Integration Module (SIM)
Data Sheet
MC68HC908QF4 — Rev. 1.0
126
System Integration Module (SIM)
MOTOROLA
14.5 SIM Counter
The SIM counter is used by the power-on reset module (POR) and in stop mode
recovery to allow the oscillator time to stabilize before enabling the internal bus
(IBUS) clocks. The SIM counter also serves as a prescaler for the computer
operating properly module (COP). The SIM counter uses 12 stages for counting,
followed by a 13th stage that triggers a reset of SIM counters and supplies the clock
for the COP module. The SIM counter is clocked by the falling edge of BUSCLKX4.
14.5.1 SIM Counter During Power-On Reset
The power-on reset module (POR) detects power applied to the MCU. At
power-on, the POR circuit asserts the signal PORRST. Once the SIM is initialized,
it enables the oscillator to drive the bus clock state machine.
14.5.2 SIM Counter During Stop Mode Recovery
The SIM counter also is used for stop mode recovery. The STOP instruction clears
the SIM counter. After an interrupt, break, or reset, the SIM senses the state of the
short stop recovery bit, SSREC, in the configuration register 1 (CONFIG1). If the
SSREC bit is a 1, then the stop recovery is reduced from the normal delay of 4096
BUSCLKX4 cycles down to 32 BUSCLKX4 cycles. This is ideal for applications
using canned oscillators that do not require long start-up times from stop mode.
External crystal applications should use the full stop recovery time, that is, with
SSREC cleared in the configuration register 1 (CONFIG1).
14.5.3 SIM Counter and Reset States
External reset has no effect on the SIM counter (see 14.7.2 Stop Mode for details.)
The SIM counter is free-running after all reset states. See 14.4.2 Active Resets
from Internal Sources for counter control and internal reset recovery sequences.
14.6 Exception Control
Normal sequential program execution can be changed in three different ways:
1.
Interrupts
a.
Maskable hardware CPU interrupts
b.
Non-maskable software interrupt instruction (SWI)
2.
Reset
3.
Break interrupts
14.6.1 Interrupts
An interrupt temporarily changes the sequence of program execution to respond to
a particular event. Figure 14-8 flow charts the handling of system interrupts.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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