參數(shù)資料
型號(hào)： MC92602ZTA
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA196
封裝： MAPBGA-196
文件頁(yè)數(shù)： 27/98頁(yè)
文件大?。?/td> 896K
代理商： MC92602ZTA
MOTOROLA
Chapter 3. Receiver
3-3
Receiver Interface Signals
“D”. Internal signals are not available at the I/O of the device, but are presented to illustrate
device operation.
Table 3-1. MC92602 Receiver Interface Signals
Signal Name
Description
Function
Direction
Active
State
RECV_x_3 through
RECV_x_0
Received Nibble
If TBIE is low these are 4 bits of uncoded
data received. Bits 3 through 0 on rising
edge of clock. Bits 7 through 4 on falling
edge of clock.
If TBIE is high these 4 bits are coded
data received. Bits 3 through 0 on rising
edge of clock. Bits 8 through 5 on falling
edge of clock.
Output
-
RECV_x_K
Special Data Indicator
If TBIE is low, both rising edge and falling
edge states are used to encode status
out. See Table 3-4.
If TBIE is high this is data bit 4 on rising
edge and data bit 9 on falling edge.
Output
-
RECV_x_ERR
Receiver Error
Receiver status out. If TBIE is low it is
used in conjunction with RECV_x_K. If
TBIE is high then it is the only status bit.
Output
-
RECV_x_CLK
Receiver Clock
Internally generated clock used for
reading receiver outputs. This signal
may be derived from the REF_CLK,
receiver A’s recovered clock, or this
receiver’s recovered clock.
Output
-
TBIE
Ten-Bit Interface Enable
Indicates that the Receiver Interface is in
ten-bit mode and that the 8B/10B
decoder is bypassed.
Input
High
HSE
Half Speed Enable
Indicates to operate link at half-speed.
Both data and link interfaces run at half
speed.
Input
High
WSE
Word Synchronization
Enable
Indicates that all enabled receivers are
being used in unison to receive
synchronized data.
Input
High
BSYNC
Byte Alignment Mode
Indicates that byte alignment is required,
if low no byte alignment is done.
Input
-
RCCE
Recovered Clock Enable Indicates that the output data is
synchronized to a recovered byte clock.
Input
High
REPE
Repeater Mode Enable
Test feature only. Must be disabled (low)
during normal operation.
Input
High
RECV_REF_A
Receiver A Clock Enable Indicates that if RCCE is also high that
the data will be synchronized to Channel
A’s recovered clock.
Input
High
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