參數(shù)資料
型號(hào): MC92602ZTA
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA196
封裝: MAPBGA-196
文件頁數(shù): 39/98頁
文件大?。?/td> 896K
代理商: MC92602ZTA
3-14
MC92602 SERDES Reference Manual
MOTOROLA
Functional Description
where: N is the frequency offset in ppm.
In an underrun situation, data must be added in order to maintain synchronization between
the clock domains. If ADIE is high the receiver interface adds a pair of Idle bytes when
underrun is imminent. The pair of Idles will be inserted prior to the next pair of Idles
in the data stream. This allows the user to establish “packets” of data that do not contain
Idles and the MC92602 will NOT insert Idles in the middle of these “packets”. The Idle
frequency to prevent underruns is identical to the frequency to prevent overruns, so the
same conditions apply. If ADIE is disabled and an underrun occurs, the “Underrun” error
is reported as described in Section 3.3.6.3 for one byte clock period.
The proper phase of the REF_CLK will be provided on RECV_n_CLK.
NOTE
When operating in “Word” mode all congured channels must
add/delete Idles simultaneously. Therefore Idles must appear in
the data stream for all channels simultaneously, so that Idles
may be inserted (adjacent to existing Idles) or deleted.
3.3.8
Half-Speed Mode
Half Speed mode, Enabled when HSE is asserted high, operates the receiver in its lower
speed range. In half speed mode, the link speed is 500 Mbps (625 Mbaud.) The receiver
interface operates at half speed as well, in pace with received data.
3.3.9
Repeater Mode
Repeater mode is not recommended for application use. It is used for factory engineering
and manufacturing test purposes only. The repeater enable signal, REPE, should be
congured low during normal operation.
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