參數(shù)資料
型號： MC92602ZTA
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA196
封裝： MAPBGA-196
文件頁數(shù)： 35/98頁
文件大?。?/td> 896K
代理商： MC92602ZTA
3-10
MC92602 SERDES Reference Manual
MOTOROLA
Functional Description
The Receiver Interface, through which received data is obtained, may be operated in Byte
mode or in Ten-Bit Interface mode. There are several timing mode options for the receiver
interface. Each of the operating modes are described below.
3.3.6.1
Byte Interface
The Receiver Interface may be operated in Byte mode or in Ten-Bit Interface, TBI, mode.
Received data is a byte (8 bits) of uncoded data when in Byte mode. The internal 8B/10B
decoder is used to decode data from the 10-bit character received. Byte interface mode is
enabled by setting TBIE low.
Table 3-4, shows how data and status will appear on the receiver interface when in Byte
Mode.
NOTE
Do not use Non-Aligned mode in Byte mode. Non-aligned
mode is only valid if TBIE is high.
3.3.6.2
Ten-Bit Interface
Received data is ten-bits of pre-coded data when in the Ten-Bit Interface, TBI, mode. The
internal 8B/10B decoder is not used and it is assumed that decoding is done externally.
Ten-Bit Interface mode is enabled by setting TBIE high.
Table 3-5, shows how data and status will appear on the receiver interface when in 10-bit
mode.
3.3.6.3
Receiver Interface Error Codes
The receiver’s status and data error conditions are coded on the RECV_x_ERR and
RECV_x_K signals (see Table 3-4 and Table 3-5).
Table 3-4. Byte Mode (TBIE = low) Receiver Outputs
Clock Edge RECV_x_ERR
RECV_x_K
RECV_x_3
RECV_x_2
RECV_x_1
RECV_x_0
Rising
E0
K0
Data Bit 3
Data Bit 2
Data Bit 1
Data Bit 0 (LSB)
Falling
E1
K1
Data Bit 7 (MSB)
Data Bit 6
Data Bit 5
Data Bit 4
Table 3-5. 10 Bit Mode (TBIE = high) Receiver Outputs
Clock Edge RECV_x_ERR
RECV_x_K
RECV_x_3
RECV_x_2
RECV_x_1
RECV_x_0
Rising
E0
Data Bit 4
Data Bit 3
Data Bit 2
Data Bit 1
Data Bit 0 (LSB)
Falling
E1
Data Bit 9 (MSB)
Data Bit 8
Data Bit 7
Data Bit 6
Data Bit 5
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