Chapter 2 Pins and Connections
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor
37
89
57
43
VREFH
90
58
VDDA
91
—
PTK4
92
—
PTK5
93
—
PTK6
94
—
PTK7
95
59
44
PTA4
PIA4
ADP4
96
60
45
PTB4
PIB4
ADP12
97
61
—
PTC4
ADP20
98
62
46
PTA5
PIA5
ADP5
99
63
47
PTB5
PIB5
ADP13
100
64
48
PTA6
PIA6
ADP6
1 Pin does not contain a clamp diode to V
DD and should not be driven above
VDD. The voltage measured on this pin when internal pull-up is enabled may
be as low as VDD - 0.7V. The internal gates connected to this pin are pulled to
VDD.
2 The IIC1 module pins can be repositioned using IIC1PS bit in the SOPT1
register. The default reset locations are on PTF2 and PTF3.
3 The SCI2 module pins can be repositioned using SCI2PS bit in the SOPT1
register. The default reset locations are on PTF0 and PTF1.
4 If both these analog modules are enabled they both will have access to the pin.
Table 2-1. Pin Availability by Package Pin-Count (continued)
Pin Number
<-- Lowest
Priority
--> Highest
100
64
48
Port
Pin/Interrupt
Alt 1
Alt 2