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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | MCF5208CVM166 |
| 寤犲晢锛� | Freescale Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 26/46闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC MCU 32-BIT 196-MAPBGA |
| 妯欐簴鍖呰锛� | 126 |
| 绯诲垪锛� | MCF520x |
| 鏍稿績铏曠悊鍣細 | Coldfire V2 |
| 鑺珨灏哄锛� | 32-浣� |
| 閫熷害锛� | 166.67MHz |
| 閫ｉ€氭€э細 | EBI/EMI锛屼互澶恫(w菐ng)锛孖²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷倷锛� | DMA锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 50 |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | ROMless |
| RAM 瀹归噺锛� | 16K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.4 V ~ 3.6 V |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 196-LBGA |
| 鍖呰锛� | 鎵樼洡 |
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MCF5208 ColdFire Microprocessor Data Sheet, Rev. 3
Electrical Characteristics
Freescale Semiconductor
32
Figure 18. DDR Write Timing
7
This specification relates to the required hold time of today鈥檚 DDR memories. MEM_DATA[31:24] is relative to MEM_DQS[3],
MEM_DATA[23:16] is relative to MEM_DQS[2], MEM_DATA[15:8] is relative to MEM_DQS[1], and MEM_[7:0] is relative
MEM_DQS[0].
8
Data input skew is derived from each DQS clock edge. It begins with a DQS transition and ends when the last data line becomes
valid. This input skew must include DDR memory output skew and system level board skew (due to routing or other factors).
9
Data input hold is derived from each DQS clock edge. It begins with a DQS transition and ends when the first data line becomes
invalid.
SD_CLK
SD_CSn, SD_WE,
DM3/DM2
D[31:24]/D[23:16]
A[13:0]
SD_RAS, SD_CAS
CMD
ROW
DD1
DD5
DD4
COL
WD1 WD2 WD3 WD4
DD7
SD_DQS3/SD_DQS2
DD8
DD7
SD_CLK
DD3
DD2
DD6
鐩搁棞PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| MC9328MXLVP20 | IC MCU I.MX 200MHZ 225-MAPBGA |
| MC9328MXLDVP20 | IC MCU I.MX 200MHZ 225-MAPBGA |
| MCF52277CVM160 | IC MCU 32BIT 166.67MHZ 196MAPBGA |
| MCIMX27LVOP4A | IC LOW END I.MX27 404-MAPBGA |
| MCIMX27LMOP4A | IC MPU I.MX27 IN 19X19 473MAPBGA |
鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁�(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| MCF5208CVM166J | 鍔熻兘鎻忚堪:32浣嶅井鎺у埗鍣� - MCU ColdFire Micro-Proc RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:C28x 铏曠悊鍣ㄧ郴鍒�:TMS320F28x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:90 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:64 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:26 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2.97 V to 3.63 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:LQFP-80 瀹夎棰ㄦ牸:SMD/SMT |
| MCF5208EC | 鍒堕€犲晢:FREESCALE 鍒堕€犲晢鍏ㄧū:Freescale Semiconductor, Inc 鍔熻兘鎻忚堪:ColdFire銏� Microprocessor |
| MCF5208EC_08 | 鍒堕€犲晢:FREESCALE 鍒堕€犲晢鍏ㄧū:Freescale Semiconductor, Inc 鍔熻兘鎻忚堪:MCF5208 ColdFire? Microprocessor Data Sheet |
| MCF52100CAE66 | 鍔熻兘鎻忚堪:32浣嶅井鎺у埗鍣� - MCU KIRIN0 WITHOUT USB RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:C28x 铏曠悊鍣ㄧ郴鍒�:TMS320F28x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:90 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:64 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:26 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2.97 V to 3.63 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:LQFP-80 瀹夎棰ㄦ牸:SMD/SMT |
| MCF52100CAE80 | 鍔熻兘鎻忚堪:32浣嶅井鎺у埗鍣� - MCU KIRIN0 WITHOUT USB RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:C28x 铏曠悊鍣ㄧ郴鍒�:TMS320F28x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:90 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:64 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:26 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2.97 V to 3.63 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:LQFP-80 瀹夎棰ㄦ牸:SMD/SMT |
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