Physical Layer Interface Controller (PLIC)
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
13-35
13.6
Application Examples
This section provides examples for applications.
13.6.1
Introduction
The following section describes the initialization of the PLIC ports and gives three application examples
demonstrating the connection of multiple transceivers or CODECs to the PLIC module.
13.6.2
PLIC Initialization
The ports on the PLIC module of the MCF5272 require a number of registers to be configured after
power-on reset and prior to use. The following are the steps necessary for initializing the ports.
The port configuration registers, PnCR, and the interrupt configuration register, PnICR, must be initialized
before using any port.
13.6.2.1
Port Configuration Example
Specify which ports are active.
Specify the operational modes, IDL8, IDL10, and so on, for the active ports, PnCR[M].
If GCI mode is specified in PnCR[M], select whether GCI SCIT mode is to be used, PnCR[G/S]
If port 1 is used, program whether the 2-KHz frame interrupt is to be derived from port 0 or port 1,
PnCR[FSM].
If port 1 is used, program whether it receives as inputs DCL and FSC or whether it drives these
signals as outputs.
If the port is in GCI mode, the PnCR[ACT] bit may be set if GCI Activation should be requested.
If port 3 is used, program the PnCR[DMX] bit if this port is routed through physical interface 3
(DIN3/DOUT3).
Program the shift direction for the B1 and B2 channels, PnCR[SHB1–SHB2], to specify msb or lsb
first.
Program PnCR[ENB1–ENB2] to specify whether B1 or B2 is enabled at initialization.
The following example shows a basic configuration of port 1, assuming the following:
Port 1 is active as slave using IDL10 mode
2-KHz frame interrupt derived from port 1
msb first on B1 and B2
B1 and B2 disabled.