I2C SERIAL TIMING SPECIFICATION" />
參數(shù)資料
型號: MCP4728-E/UN
廠商: Microchip Technology
文件頁數(shù): 32/33頁
文件大?。?/td> 0K
描述: IC DAC 12BIT W/I2C 10-MSOP
視頻文件: MCP4728 Evaluation Board Demo
標(biāo)準(zhǔn)包裝: 100
設(shè)置時間: 6µs
位數(shù): 12
數(shù)據(jù)接口: EEPROM,I²C,串行
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 管件
輸出數(shù)目和類型: 4 電壓,單極
采樣率(每秒): *
產(chǎn)品目錄頁面: 673 (CN2011-ZH PDF)
配用: MCP4728EV-ND - BOARD EVAL 12BIT 4CH DAC MCP4728
MCP4728
DS22187E-page 8
2010 Microchip Technology Inc.
I2C SERIAL TIMING SPECIFICATIONS
Electrical Specifications: Unless otherwise specified, all limits are specified for T
A = -40 to +125°C, VSS = 0V,
Standard and Fast Mode: VDD = +2.7V to +5.5V
High Speed Mode: VDD = +4.5V to +5.5V.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Clock Frequency
fSCL
0
100
kHz
Standard Mode
Cb = 400 pF, 2.7V – 5.5V
0
400
kHz
Fast Mode
Cb = 400 pF, 2.7V – 5.5V
0
1.7
MHz
High Speed Mode 1.7
Cb = 400 pF, 4.5V – 5.5V
0
3.4
MHz
High Speed Mode 3.4
Cb = 100 pF, 4.5V – 5.5V
Bus Capacitive Loading
Cb
400
pF
Standard Mode
2.7V – 5.5V
400
pF
Fast Mode
2.7V – 5.5V
400
pF
High Speed Mode 1.7
4.5V – 5.5V
100
pF
High Speed Mode 3.4
4.5V – 5.5V
Start Condition Setup Time
(Start, Repeated Start)
TSU:STA
4700
ns
Standard Mode
600
ns
Fast Mode
160
ns
High Speed Mode 1.7
160
ns
High Speed Mode 3.4
Start Condition Hold Time
THD:STA
4000
ns
Standard Mode
600
ns
Fast Mode
160
ns
High Speed Mode 1.7
160
ns
High Speed Mode 3.4
Stop Condition Setup Time
TSU:STO
4000
ns
Standard Mode
600
ns
Fast Mode
160
ns
High Speed Mode 1.7
160
ns
High Speed Mode 3.4
Clock High Time
THIGH
4000
ns
Standard Mode
600
ns
Fast Mode
120
ns
High Speed Mode 1.7
60
ns
High Speed Mode 3.4
Clock Low Time
TLOW
4700
ns
Standard Mode
1300
ns
Fast Mode
320
ns
High Speed Mode 1.7
160
ns
High Speed Mode 3.4
Note 1:
This parameter is ensured by characterization and is not 100% tested.
2:
After a Repeated Start condition or an Acknowledge bit.
3:
If this parameter is too short, it can create an unintentional Start or Stop condition to other devices on the I2C bus line. If
this parameter is too long, the Data Input Setup (TSU:DAT) or Clock Low time (TLOW) can be affected.
Data Input: This parameter must be longer than t
SP.
Data Output: This parameter is characterized, and tested indirectly by testing T
AA parameter.
4:
This specification is not a part of the I2C specification. This specification is equivalent to the Data Hold Time (THD:DAT)
plus SDA Fall (or rise) time: TAA = THD:DAT + TFSDA (OR TRSDA).
5:
Time between Start and Stop conditions.
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