- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377972 > ML6460 (Fairchild Semiconductor Corporation) CCIR656 NTSC Video Encoder(CCIR656標(biāo)準(zhǔn)NTSC視頻編碼器) PDF資料下載
參數(shù)資料
| 型號(hào)： | ML6460 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | CCIR656 NTSC Video Encoder(CCIR656標(biāo)準(zhǔn)NTSC視頻編碼器) |
| 中文描述： | CCIR656 NTSC視頻編碼器（CCIR656標(biāo)準(zhǔn)NTSC制式視頻編碼器） |
| 文件頁數(shù)： | 19/30頁 |
| 文件大小： | 217K |
| 代理商： | ML6460 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁
ML6460
REV. 1.0 10/25/2000
19
FUNCTIONAL DESCRIPTION
(Continued)
SLAVE/MASTER, B28
This bit determines if device
operates in master or slave modes. Configuration of
HSYNC, VSYNC and FIELD are determined upon
selection of this bit. Table 3 provides a summary of Slave
/ Master modes. When this bit is set (B28=1), the
ML6460 is in slave mode. When this bit is cleared
(B28=0), the ML6460 is in master mode. Special note for
slave modes: this bit (B28) along with the
SLAVE_MODE bit (B26) selects between internal
(B26=1) and external slave modes (B26=0).
SELCCIR, B27
This bit determines the frequency of
choice between CCIR656 clock rate(27MHz) and Square
Pixel clock rate (24.54MHz). When this bit is set
(B27=1), CCIR656 clock rate is selected. When this bit is
cleared (B27=0), the Square Pixel clock rate is selected.
SLAVE_MODE, B26
This bit determines the choice of
two slave modes: internal slave mode or external slave
mode. In internal slave mode (B26=1), horizontal and
vertical timing information is embedded in the YCrCb
data (via SAV / EAV codes); while the HSYNC and
VSYNC pins can be used as outputs. In external slave
mode (B26=0), horizontal and vertical sync pulses must
be provided for timing and synchronization;in this case
HSYNC and VSYNC pins are inputs. See Table 3.
HRESET_MODE, B25
This bit determines whether the
HSYNC is given at the beginning of active video (B25=1)
or HSYNC is given at the beginning of blanking (B25=0).
This bit (B25) is only available for external slave modes.
Figure 13. Closed Caption on Line 21 and Line 284.
BLANK
LEVEL
SYNC
LEVEL
S
T
A
R
T
A0 ~ A6
A8 ~ A14
A7
A15
LINE 21
50 ±2 IRE
3.58MHz
COLOR
BURST
7 CYCLES
40 IRE
10.003
±0.25μs
27.382μs
33.764μs
10.5
±0.25μs
12.91μs
TWO: 7 BIT + PARITY BIT
Closed Caption on Line21
[CC_21 = 1 and CC_284 = 0]
BLANK
LEVEL
SYNC
LEVEL
S
T
A
R
T
A0 ~ A6
A8 ~ A14
A7
A15
LINE 284
50 ±2 IRE
3.58MHz
COLOR
BURST
7 CYCLES
40 IRE
10.003
±0.25μs
27.382μs
33.764μs
10.5
±0.25μs
12.91μs
TWO: 7 BIT + PARITY BIT
Closed Caption on Line284
[CC_21 = 0 and CC_284 = 1]
BLANK
LEVEL
SYNC
LEVEL
S
T
A
R
T
A0 ~ A6
A8 ~ A14
A7
A15
LINE 21
50 ±2 IRE
3.58MHz
COLOR
BURST
7 CYCLES
40 IRE
10.003
±0.25μs
27.382μs
33.764μs
10.5
±0.25μs
12.91μs
TWO: 7 BIT + PARITY BIT
Closed Caption on Line21 and Line 284
[CC_21 = 1 and CC_284 = 1]
BLANK
LEVEL
SYNC
LEVEL
S
T
A
R
T
A16 ~ A22
A24 ~ A30
A23
A31
LINE 284
50 ±2 IRE
3.58MHz
COLOR
BURST
7 CYCLES
40 IRE
10.003
±0.25μs
27.382μs
33.764μs
10.5
±0.25μs
12.91μs
TWO: 7 BIT + PARITY BIT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ML6509 | Active SCSI Terminator(SCSI系統(tǒng)的有源終端器) |
| ML6510 | Series Programmable Adaptive Clock Manager(系列可編程自適應(yīng)時(shí)鐘管理器) |
| ML6516244 | 16-Bit Buffer/Line Driver with 3-State Outputs(BiCMOS 16位緩沖器/線驅(qū)動(dòng)器（三態(tài)輸出）) |
| ML6518 | 18 Line Hot-Insertable Active SCSI Terminator(線熱插入有源SCSI終端器) |
| ML65244 | High Speed Dual Quad Buffer/Line Drivers(高速雙通道四緩沖器/線驅(qū)動(dòng)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML6460CS | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:NTSC Video Encoder with Macrovision |
| ML6461 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:NTSC Video Encoder |
| ML6461CS | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:NTSC Video Encoder |
| ML648PTA102MLZ | 制造商:COILCRAFT 制造商全稱:Coilcraft lnc. 功能描述:High Reliability Power Inductors |
| ML64P168 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。