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| 型號： | MM908E624ACDWBR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 17/39頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TRPL SWITCH MCU/LIN 54-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 應(yīng)用： | 自動鏡像控制 |
| 核心處理器： | HC08 |
| 程序存儲器類型： | 閃存（16 kB） |
| 控制器系列： | 908E |
| RAM 容量： | 512 x 8 |
| 接口： | SCI，SPI |
| 輸入/輸出數(shù)： | 16 |
| 電源電壓： | 5.5 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 54-BSSOP（0.295"，7.50mm 寬） |
| 包裝： | 帶卷 (TR) |
| 供應(yīng)商設(shè)備封裝： | 54-SOIC |
| 配用： | KIT908E624DWBEVB-ND - KIT EVAL 908E624 TRPL W/MCU/LIN |
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Analog Integrated Circuit Device Data
24
Freescale Semiconductor
908E624
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
disconnected from VSUP and a small current source keeps
the LIN pin in recessive state. The receiver is still active to be
able to detect wake-up events on the LIN bus line.
A dominant level longer than tPROPWL followed by an rising
edge will generate a system wake-up (reset) and set the
LINWF flag in the SPI Status Register. Also see Figure 8,
WINDOW WATCHDOG
The window watchdog is configurable using an external
resistor at the WDCONF pin. The watchdog is cleared
through by the MODE1:2 bits in the SPI Control register (refer
to Table 8, page 26).
A watchdog clear is only allowed in the open window. If the
watchdog is cleared in the closed window or has not been
cleared at the end of the open window, the watchdog will
generate a reset on the RST_A pin and reset the whole
device.
Note
The watchdog clear in Normal request mode
(150 ms) (first watchdog clear) has no window.
Figure 16. Window Watchdog Operation
Watchdog Configuration
If the WDCONF pin is left open, the default watchdog
period is selected (typ. 150 ms). If no watchdog function is
required, the WDCONF pin must be connected to GND.
The watchdog period is calculated using the following
formula:
tPWD [ms] = 0.991 * REXT [kΩ] + 0.648
VOLTAGE REGULATOR
The 908E624 chip contains a low-power, low dropout
voltage regulator to provide internal power and external
power for the MCU. The on-chip regulator consist of two
elements, the main voltage regulator and the low-voltage
reset circuit.
The VDD regulator accepts an unregulated input supply
and provides a regulated VDD supply to all digital sections of
the device. The output of the regulator is also connected to
the VDD pin to provide the 5.0 V to the microcontroller.
Current Limit (Over-current) Protection
The voltage regulator has current limit to protect the device
against over-current and short-circuit conditions.
Over-temperature Protection
The voltage regulator also features an over-temperature
protection having an over-temperature warning (Interrupt -
VDDT) and an over-temperature shutdown.
Stop Mode
During Stop mode, the Stop mode regulator supplies a
regulated output voltage. The Stop mode regulator has a
limited output current capability.
Sleep Mode
In Sleep mode the voltage regulator external VDD is turned
off.
FACTORY TRIMMING AND CALIBRATION
To enhance the ease of use of the 908E624, various
parameters (e.g., ICG trim value) are stored in the flash
memory of the device. The following flash memory locations
are reserved for this purpose and might have a value different
from the “empty” (0xFF) state:
0xFD80:0xFDDF Trim and Calibration Values
0xFFFE:0xFFFF Reset Vector
In the event the application uses these parameters, one
has to take care not to erase or override these values. If these
parameters are not used, these flash locations can be erased
and otherwise used.
Trim Values
The usage of the trim values, located in the flash memory,
is explained in the following.
Internal Clock Generator (ICG) Trim Value
The internal clock generator (ICG) module is used to
create a stable clock source for the microcontroller without
using any external components. The untrimmed frequency of
the low frequency base clock (IBASE), will vary as much as
±25%, due to process, temperature, and voltage
dependencies. To compensate for these dependencies, an
ICG trim value is located at the address $FDC2. After
trimming the ICG, a range of typ. ±2% (±3% max.) at nominal
conditions (filtered (100 nF) and stabilized (4.7
μF) VDD =
5.0 V, TAmbient~23 °C) and will vary over-temperature and
voltage (VDD) as indicated in the 68HC908EY16 data sheet.
To trim the ICG, these values must be copied to the ICG
Trim Register ICGTR at address $38 of the MCU.
Important
The value has to be copied after every reset.
OPERATING MODES OF THE MCU
For a detailed description of the operating modes of the
MCU, refer to the MC68HC908EY16 data sheet.
Window closed
no watchdog clear allowed
Window open
for watchdog clear
WD timing x 50%
WD period (PWD)
WD timing selected by resistor on WDCONF terminal.
(tPWD)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM908E624ACEW | 功能描述:開關(guān) IC - 各種 TRIPLE HIGH SIDE SW RoHS:否 制造商:Fairchild Semiconductor 開啟電阻（最大值）: 電源電壓-最大:4.4 V 電源電壓-最小:2.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:WLCSP-9 封裝:Reel |
| MM908E624ACEW/R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Triple High Side Switch with Embedded MCU and LIN Serial Communicationfor Relay Drivers |
| MM908E624ACEWR2 | 功能描述:電源開關(guān) IC - 配電 TRIPLE HIGH SIDE DRIVER RoHS:否 制造商:Exar 輸出端數(shù)量:1 開啟電阻（最大值）:85 mOhms 開啟時間（最大值）:400 us 關(guān)閉時間（最大值）:20 us 工作電源電壓:3.2 V to 6.5 V 電源電流（最大值）: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-5 |
| MM908E624ACPEW | 功能描述:8位微控制器 -MCU 3 HIGH SIDE SWITCH RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E624ACPEWR2 | 功能描述:8位微控制器 -MCU 3 HIGH SIDE DRIVER RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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