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參數(shù)資料
型號: MM912F634BV1AE
廠商: Freescale Semiconductor
文件頁數(shù): 123/339頁
文件大?。?/td> 0K
描述: IC MCU 16BIT 32KB FLASH 48LQFP
標(biāo)準(zhǔn)包裝: 1
核心處理器: HCS12
芯體尺寸: 16-位
速度: 20MHz
連通性: LIN,SCI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 9
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 15x10b
振蕩器型: 外部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP 裸露焊盤
包裝: 托盤
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Functional Description and Application Information
Background Debug Module (S12SBDMV1)
MM912F634
Freescale Semiconductor
209
NOTE
The ACK pulse does not provide a timeout. This means for the GO_UNTIL(169) command
that it can not be distinguished if a stop or wait has been executed (command discarded and
ACK not issued) or if the “UNTIL” condition (BDM active) is just not reached yet. Hence in
any case where the ACK pulse of a command is not issued the possible pending command
should be aborted before issuing a new command. See the handshake abort procedure
The ACK handshake protocol does not support nested ACK pulses. If a BDM command is not acknowledge by an ACK pulse,
the host needs to abort the pending command first in order to be able to issue a new BDM command. When the CPU enters wait
or stop while the host issues a hardware command (e.g., WRITE_BYTE), the target discards the incoming command due to the
wait or stop being detected. Therefore, the command is not acknowledged by the target, which means that the ACK pulse will
not be issued in this case. After a certain time the host (not aware of stop or wait) should decide to abort any possible pending
ACK pulse in order to be sure a new command can be issued. Therefore, the protocol provides a mechanism in which a
command, and its corresponding ACK, can be aborted.
4.30.4.8
Hardware Handshake Abort Procedure
The abort procedure is based on the SYNC command. In order to abort a command, which has not issued the corresponding
ACK pulse, the host controller should generate a low pulse in the BKGD pin by driving it low for at least 128 serial clock cycles
and then driving it high for one serial clock cycle, providing a speedup pulse. By detecting this long low pulse in the BKGD pin,
the target executes the SYNC protocol, see Section 4.30.4.9, “SYNC — Request Timed Reference Pulse"”, and assumes that
the pending command and therefore the related ACK pulse, are being aborted. Therefore, after the SYNC protocol has been
completed the host is free to issue new BDM commands. For Firmware READ or WRITE commands it can not be guaranteed
that the pending command is aborted when issuing a SYNC before the corresponding ACK pulse. There is a short latency time
from the time the READ or WRITE access begins until it is finished and the corresponding ACK pulse is issued. The latency time
depends on the firmware READ or WRITE command that is issued and on the selected bus clock rate. When the SYNC command
starts during this latency time the READ or WRITE command will not be aborted, but the corresponding ACK pulse will be
aborted. A pending GO, TRACE1 or GO_UNTIL(169) command can not be aborted. Only the corresponding ACK pulse can be
aborted by the SYNC command.
NOTE
The details about the short abort pulse are being provided only as a reference for the reader
to better understand the BDM internal behavior. It is not recommended that this procedure
be used in a real application.
Although it is not recommended, the host could abort a pending BDM command by issuing a low pulse in the BKGD pin shorter
than 128 serial clock cycles, which will not be interpreted as the SYNC command. The ACK is actually aborted when a negative
edge is perceived by the target in the BKGD pin. The short abort pulse should have at least 4 clock cycles keeping the BKGD
pin low, in order to allow the negative edge to be detected by the target. In this case, the target will not execute the SYNC protocol
but the pending command will be aborted along with the ACK pulse. The potential problem with this abort procedure is when
there is a conflict between the ACK pulse and the short abort pulse. In this case, the target may not perceive the abort pulse. The
worst case is when the pending command is a read command (i.e., READ_BYTE). If the abort pulse is not perceived by the target
the host will attempt to send a new command after the abort pulse was issued, while the target expects the host to retrieve the
accessed memory byte. In this case, host and target will run out of synchronism. However, if the command to be aborted is not
a read command the short abort pulse could be used. After a command is aborted the target assumes the next negative edge,
after the abort pulse, is the first bit of a new BDM command.
Since the host knows the target serial clock frequency, the SYNC command (used to abort a command) does not need to consider
the lower possible target frequency. In this case, the host could issue a SYNC very close to the 128 serial clock cycles length.
Providing a small overhead on the pulse length in order to assure the SYNC pulse will not be misinterpreted by the target. See
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MM912F634BV1AER2 功能描述:16位微控制器 - MCU DUAL LS/HS SWITCH W. LIN RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
MM912F634BV2AE 功能描述:16位微控制器 - MCU DUAL LS/HS SWITCH W. LIN RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
MM912F634BV2AER2 功能描述:16位微控制器 - MCU DUAL LS/HS SWITCH W. LIN RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
MM912F634BV3AE 功能描述:16位微控制器 - MCU DUAL LS/HS SWITCH W. LIN RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
MM912F634BV3AER2 功能描述:16位微控制器 - MCU DUAL LS/HS SWITCH W. LIN RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT