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Communication Processor Module
16-318
MPC823 USER’S MANUAL
MOTOROLA
SCC2
COMMUNICATION
16
PROCESSOR
MODULE
If a match is found, the Ethernet controller fetches the next RX buffer descriptor and, if it is
empty, starts transferring the incoming frame to the RX buffer descriptor associated data
buffer. If a collision is detected during the frame, the RX buffer descriptors associated with
this frame are reused. Thus, there will be no collision frames presented to you except late
collisions, which indicate serious LAN problems. When the data buffer has been filled, the
Ethernet controller clears the E bit in the RX buffer descriptor and generates an interrupt if
the I bit is set. If the incoming frame exceeds the length of the data buffer, the Ethernet
controller fetches the next RX buffer descriptor in the table and, if it is empty, continues
transferring the rest of the frame to this buffer descriptor associated data buffer. The RX
buffer descriptor length is determined in the MRBLR value in the SCC2 parameter RAM.
You should program the MRBLR to be at least 64 bytes.
During reception, the Ethernet controller checks for a frame that is either too short or too
long. When the frame ends, the receive CRC field is checked and written to the data buffer.
The data length written to the last buffer descriptor in the Ethernet frame is the length of the
entire frame and it enables the software to correctly recognize the frame-too-long condition.
The Ethernet controller then sets the L bit in the RX buffer descriptor, writes the other frame
status bits into the RX buffer descriptor, and clears the E bit. Then it generates a maskable
interrupt, which indicates that a frame has been received and is in memory. The Ethernet
controller then waits for a new frame. It receives serial data least-significant bit first.
16.9.22.7 SCC2 ETHERNET PARAMETER RAM MEMORY MAP. When configured to
operate in Ethernet mode, the SCC2 overlays the structure used in
Table 16-24 onto the
Table 16-30. SCC2 Ethernet Parameter RAM Memory Map
ADDRESS
NAME
WIDTH
DESCRIPTION
SCC2 Base + 30
C_PRES
Word
Preset CRC
SCC2 Base + 34
C_MASK
Word
Constant MASK for CRC
SCC2 Base + 38
CRCEC
Word
CRC Error Counter
SCC2 Base + 3C
ALEC
Word
Alignment Error Counter
SCC2 Base + 40
DISFC
Word
Discard Frame Counter
SCC2 Base + 44
PADS
Half-word
Short Frame PAD character
SCC2 Base + 46
RET_LIM
Half-word
Retry Limit Threshold
SCC2 Base + 48
RET_CNT
Half-word
Retry Limit Counter
SCC2 Base + 4A
MFLR
Half-word
Maximum Frame Length Register
SCC2 Base + 4C
MINFLR
Half-word
Minimum Frame Length Register
SCC2 Base + 4E
MAXD1
Half-word
Max DMA1 Length Register
SCC2 Base + 50
MAXD2
Half-word
Max DMA2 Length Register
SCC2 Base + 52
MAXD
Half-word
RX Max DMA
SCC2 Base + 54
DMA_CNT
Half-word
RX DMA Counter