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參數(shù)資料
| 型號(hào)： | MPC8245ARVV400D |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 400 MHz, RISC PROCESSOR, PBGA352 |
| 封裝： | 35 X 35 MM, 1.65 MM HEIGHT, 1.27 MM PITCH, LEAD FREE, TBGA-352 |
| 文件頁數(shù)： | 21/68頁 |
| 文件大?。?/td> | 1143K |
| 代理商： | MPC8245ARVV400D |
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MPC8245 Integrated Processor Hardware Specifications, Rev. 9
28
Freescale Semiconductor
Electrical and Thermal Characteristics
Figure 16. I2C Timing Diagram I
Figure 17. I2C Timing Diagram II
7
Data setup time
(MPC8245 as a master only)
(DFDR/2) – (output data hold time)
—
CLKs
1, 3
8
Start condition setup time
(for repeated start condition only)
DFDR + (output start condition hold time)
—
CLKs
1, 2, 3
9
Stop condition setup time
4.0
—
CLKs
1, 2
Notes:
1. Units for these specifications are in SDRAM_CLK units.
2. The actual values depend on the setting of the digital filter frequency sampling rate (DFFSR) bits in the frequency divider
register, I2CFDR. Therefore, these timings are relative to qualified signals. The qualified SCL and SDA are delayed signals
in comparison to real time on the I2C bus. The qualified SCL, SDA signals are delayed by the SDRAM_CLK clock times
DFFSR times 2 plus 1 SDRAM_CLK clock. The resulting delay value is added to the value in the table (where this note is
3. DFDR is the decimal divider number indexed by the value of FDR[5:0]. Refer to Table 10-5 in the MPC8245 Integrated
Processor Reference Manual. FDR[x] refers to bit x of the frequency divider register, I2CFDR. N is equal to a variable number
resulting from the divide (data hold time value) equal to a number less than 16. M is equal to a variable number resulting
from the divide (data hold time value) equal to a number less than 9.
4. Since SCL and SDA are open-drain outputs, which the MPC8245 can only drive low, the time required for SCL or SDA to
reach a high level depends on external signal capacitance and pull-up resistor values.
5. Specified at a nominal 50-pF load.
Table 14. I2C Output AC Timing Specifications (continued)
Num
Characteristic
Min
Max
Unit
Notes
SCL
SDA
VM
6
2
1
4
SCL
SDA
VM
VL
VH
9
8
3
5
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