參數(shù)資料
型號(hào): MPC8275VR
廠商: Motorola, Inc.
英文描述: PowerQUICC II Family Hardware Specifications
中文描述: 的PowerQUICC II系列硬件規(guī)格
文件頁數(shù): 3/76頁
文件大小: 496K
代理商: MPC8275VR
MOTOROLA
MPC8280 PowerQUICC II Family Hardware Specifications
3
Overview
Figure 1 shows the block diagram. Shaded portions are device-specific; refer to the notes below.
Figure 1. MPC8280 Block Diagram
1.1
Features
The major features of the MPC8280 are as follows:
Dual-issue integer (G2_LE) core
— A core version of the EC603e microprocessor
— System core microprocessor supporting frequencies of 166–450 MHz
— Separate 16-Kbyte data and instruction caches:
– Four-way set associative
– Physically addressed
– LRU replacement algorithm
— PowerPC architecture-compliant memory management unit (MMU)
— Common on-chip processor (COP) test interface
16 Kbytes
I-Cache
G2_LE Core
I-MMU
16 Kbytes
D-Cache
D-MMU
Communication Processor Module (CPM)
Timers
Parallel I/O
Baud Rate
Generators
32 KB
Instruction
RAM
32-bit RISC Microcontroller
and Program ROM
Serial
DMAs
4 Virtual
IDMAs
60x-to-PCI
Bridge
60x-to-Local
Bridge
Memory Controller
Clock Counter
System Functions
System Interface Unit
(SIU)
Local Bus
32 bits, up to 100 MHz
PCI Bus
32 bits, up to 66 MHz
or
MCC1
1
MCC2
FCC1
FCC2
FCC3
SCC1
SCC2
SCC3
SCC4/
USB
SMC1
SMC2
SPI
I
2
C
Serial Interface
2
3 MII or RMII
Ports
2 UTOPIA
Ports
3
60x Bus
MiIMA
1
Data
RAM
Interrupt
Controller
Time Slot Assigner
TC Layer Hardware
1
8 TDM Ports
2
Non-Multiplexed
I/O
Bus Interface Unit
32 KB
Notes:
1
MPC8280 only (not on MPC8270, the VR package, nor the ZQ package)
2
MPC8280 has 2 serial interface (SI) blocks and 8 TDM ports. MPC8270 and the VR and ZQ packages have
only 1 SI block and 4 TDM ports (TDM2[A–D]).
3
MPC8280, MPC8275VR, MPC8275ZQ only (not on MPC8270, MPC8270VR, nor MPC8270ZQ)
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