- 您現在的位置：買賣IC網 > PDF目錄371135 > MPC8275VR (Motorola, Inc.) PowerQUICC II Family Hardware Specifications PDF資料下載
參數資料
| 型號： | MPC8275VR |
| 廠商： | Motorola, Inc. |
| 英文描述： | PowerQUICC II Family Hardware Specifications |
| 中文描述： | 的PowerQUICC II系列硬件規(guī)格 |
| 文件頁數： | 75/76頁 |
| 文件大?。?/td> | 496K |
| 代理商： | MPC8275VR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁當前第75頁第76頁
MOTOROLA
MPC8280 PowerQUICC II Family Hardware Specifications
75
Document Revision History
1.0
2/2004
Removal of “Advance Information” and “Preliminary.” The MPC8280 is fully qualified.
Table 1: New
Figure 1: Modification to note 2
Section 1.1: Core frequency range is 166–450 MHz
Addition of ZQ (516 PBGA with Lead spheres) package references
Table 4: VDD and VCCSYN modified to 1.45–1.60 V
Note following Table 4: Modified
Table 5: Addition of note 2 regarding TRST and PORESET (see VIH row of Table 5)
Table 5: Changed I
OL
for 60x signals to 6.0 mA
Table 5: Moved QREQ to V
OL
: I
OL
= 3.2 mA
Table 5: Addition of critical interrupt (CINT) to IRQ5 for V
Table 6: Addition of
Ψ
JT
and note 4
Sections 4.1–4.2: New
Table 7: Modified power values (+ 150mW to each)
Table 8: Addition of note 2. Changed PCI impedance to 27
.
Table 9: Changes to sp36b, SP38a, sp38b, sp37a, sp39a, sp40 and sp41
Table 10: Changes to sp16a, sp18a, sp20 and sp21
Section 6.2: Addition of Note: CLKIN Jitter and Duty Cycle
Table 11: Changes to sp13 @ 66 and 83 MHz, sp14 @ 83 MHz
Table 12: Change to sp30 (data bus signals). Changes to sp33b. Removal of note 2.
Table 15 through Table 19: Modification of note 1 regarding CPU and CPM Fmin. Modification
to corresponding values in tables.
Table 20: Addition of note 1 to TRST (AH3) and PORESET (AG6)
Table 20: Addition of RXD3 to CPM port pin PB14. Previously omitted.
Table 20: Addition of critical interrupt (CINT) to B21 and U4. Previously omitted.
Table 20: Addition of note 5 to ‘No connect’ (AA1, AG4)
Addition of “Note: Temperature Reflow for the VR Package" on page 58
Table 22: Addition of note 1 to TRST (F22) and PORESET (B25)
Table 22: Addition of previously omitted signals that are multiplexed with CPM port pins:
PA6—FCC2_UT_RXADDR3
PA7—FCC2_UT_TXADDR3
PA8—FCC2_UT_TXADDR4
PB14—RXD3
PC19—SPICLK
PC22—FCC1_UT_TXPRTY
PC28—FCC2_UT_RXADDR4
Table 22: Removal of serial interface 1 (SI1) signals from port pins (see note 2 in Figure 1):
PA[6–9], PB[8–17, 20–25], PC[6–7, 10–13], PD[4, 10–13, 16, 23–28]
Table 22: Addition of critical interrupt (CINT) to AC1 and B14. Previously omitted.
Table 22: Addition of note 5 to ‘No connect’ (E17, C23)
OL
(I
OL
= 6.0mA)
Table 24. Document Revision History
Revision
Date
Substantive Changes
相關PDF資料 |
PDF描述 |
|---|---|
| MPC850DE | Communications Controller Hardware Specifications |
| MPC850EC | Communications Controller Hardware Specifications |
| MPC850ED | Communications Controller Hardware Specifications |
| MPC850SAR | Communications Controller Hardware Specifications |
| MPC859P | PowerQUICC⑩ Family Technical Summary |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MPC8275VRB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications |
| MPC8275VRE | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications |
| MPC8275VRI | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications |
| MPC8275VRM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications |
| MPC8275VRMIBA | 功能描述:微處理器 - MPU 266 MHz 505.4 MIPS RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
發(fā)布緊急采購，3分鐘左右您將得到回復。