參數(shù)資料
型號: MPC8308-KIT
廠商: Freescale Semiconductor
文件頁數(shù): 28/83頁
文件大?。?/td> 0K
描述: KIT EVALUATION FOR MPC830X
標(biāo)準(zhǔn)包裝: 1
系列: PowerQUICC II™ PRO
類型: MPU
適用于相關(guān)產(chǎn)品: MPC8308
所含物品: 板,線纜,CD,電源
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
34
Freescale Semiconductor
PCI Express
10.2.4.1
Spread Spectrum Clock
SD_REF_CLK/SD_REF_CLK are not intended to be used with, and should not be clocked by, a spread
spectrum clock source.
10.3
SerDes Transmitter and Receiver Reference Circuits
This figure shows the reference circuits for SerDes data lane’s transmitter and receiver.
Figure 26. SerDes Transmitter and Receiver Reference Circuits
The DC and AC specification of SerDes data lanes are defined in Section 11, “PCI Express.”
Note that external AC coupling capacitor is required for the PCI Express serial transmission protocol with
the capacitor value defined in specification of PCI Express protocol section.
11 PCI Express
This section describes the DC and AC electrical specifications for the PCI Express bus.
11.1
DC Requirements for PCI Express SD_REF_CLK and
SD_REF_CLK
11.2
AC Requirements for PCI Express SerDes Clocks
This table lists the PCI Express SerDes clock AC requirements.
Table 33. SD_REF_CLK and SD_REF_CLK AC Requirements
Symbol
Parameter Description
Min
Typ
Max
Units
Notes
tREF
REFCLK cycle time (for 125 MHz and 100 MHz)
8
10
ns
tREFCJ
REFCLK cycle-to-cycle jitter. Difference in the period
of any two adjacent REFCLK cycles.
——
100
ps
tREFPJ
Phase jitter. Deviation in edge location with respect to
mean edge location.
–50
50
ps
50
50
Receiver
Transmitter
TXn
RXn
50
50
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