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參數(shù)資料
| 型號(hào)： | MPC8313EVRAGDB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516 |
| 封裝： | 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, LEAD FREE, TEPBGAII-516 |
| 文件頁數(shù)： | 38/100頁 |
| 文件大小： | 1247K |
| 代理商： | MPC8313EVRAGDB |
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MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
42
Freescale Semiconductor
High-Speed Serial Interfaces (HSSI)
Figure 28. AC-Coupled Differential Connection with LVDS Clock Driver (Reference Only)
Figure 29 shows the SerDes reference clock connection reference circuits for LVPECL type clock driver.
Since LVPECL driver’s DC levels (both common mode voltages and output swing) are incompatible with
the MPC8313E SerDes reference clock input’s DC requirement, AC coupling has to be used. Figure 29
assumes that the LVPECL clock driver’s output impedance is 50
Ω. R1 is used to DC-bias the LVPECL
outputs prior to AC coupling. Its value could be ranged from 140 to 240
Ω depending on the clock driver
vendor’s requirement. R2 is used together with the SerDes reference clock receiver’s 50-
Ω termination
resistor to attenuate the LVPECL output’s differential peak level such that it meets the MPC8313E
SerDes3 reference clock’s differential input amplitude requirement (between 200 and 800 mV differential
peak). For example, if the LVPECL output’s differential peak is 900 mV and the desired SerDes reference
clock input amplitude is selected as 600 mV, the attenuation factor is 0.67, which requires R2 = 25
Ω.
Consult with the clock driver chip manufacturer to verify whether this connection scheme is compatible
with a particular clock driver chip.
Figure 29. AC-Coupled Differential Connection with LVPECL Clock Driver (Reference Only)
SD
n_REF_CLK
SD
n_REF_CLK
Clock Driver
100
Ω Differential PWB Trace
CLK_Out
LVDS CLK Driver Chip
10 nF
MPC8313E
SerDes Refer.
CLK Receiver
50
Ω
50
Ω
Clock Driver
SD
n_REF_CLK
SD
n_REF_CLK
Clock Driver
100
Ω Differential PWB Trace
SerDes Refer.
CLK Receiver
Clock Driver
CLK_Out
LVPECL CLK Driver Chip
R2
MPC8313E
10 nF
CLK_Out
R2
R1
Clock Driver
50
Ω
R1
50
Ω
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8313EVRAGDC | 功能描述:微處理器 - MPU 8313 REV2.2 W/ENC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8313EVRGDD | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8313EVRGDDA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8313EVRGDDB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8313EVRGDF | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
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