參數(shù)資料
型號(hào): MPC8540VT833LC
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 30/104頁(yè)
文件大?。?/td> 0K
描述: MPU POWERQUICC III 783FCPBGA
標(biāo)準(zhǔn)包裝: 36
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 833MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 784-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MPC8540 Integrated Processor Hardware Specifications, Rev. 4.1
Freescale Semiconductor
31
Ethernet: Three-Speed,10/100, MII Management
Figure 14 shows the RGMII and RTBI AC timing and multiplexing diagrams.
Figure 14. RGMII and RTBI AC Timing and Multiplexing Diagrams
8.3 10/100 Ethernet Controller (10/100 Mbps)—MII Electrical
Characteristics
The electrical characteristics specified here apply to the MII (media independent interface) signals except
MDIO (management data input/output) and MDC (management data clock). The MII interface can be
operated at 3.3 or 2.5 V. Whether the MII interface is operated at 3.3 or 2.5 V, the timing is compliant with
the IEEE 802.3 standard. The electrical characteristics for MDIO and MDC are specified in Section 2.1.3,
8.3.1 MII DC Electrical Characteristics
All MII drivers and receivers comply with the DC parametric attributes specified in Table 30. The potential
applied to the input of a MII receiver may exceed the potential of the receiver’s power supply (that is, a
MII driver powered from a 3.6-V supply driving VOH into a MII receiver powered from a 2.5-V supply).
Tolerance for dissimilar MII driver and receiver supply potentials is implicit in these specifications.
GTX_CLK
tRGT
tRGTH
tSKRGT
TX_CTL
TXD[8:5]
TXD[7:4]
TXD[9]
TXERR
TXD[4]
TXEN
TXD[3:0]
(At Transmitter)
TXD[8:5][3:0]
TXD[7:4][3:0]
TX_CLK
(At PHY)
RX_CTL
RXD[8:5]
RXD[7:4]
RXD[9]
RXERR
RXD[4]
RXDV
RXD[3:0]
RXD[8:5][3:0]
RXD[7:4][3:0]
RX_CLK
(At PHY)
tSKRGT
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