208
AT90PWM216/316 [DATASHEET]
7710H–AVR–07/2013
Note:
The example code assumes that the part specific header file is included.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must be
replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with “SBRS”,
“SBRC”, “SBR”, and “CBR”.
18.5.3
Receiving 17 Data Bit Frames
In this configuration the seventeenth bit shoud be read from the RXB8 bit register, the rest of the most significant
bits (9, 10, 11, 12, 13, 14, 15 and 16) should be read from the EUDR register, before the low byte of the character
is read from UDR.
18.5.4
Receive Complete Flag and Interrupt
The EUSART Receiver has the same USART flag that indicates the Receiver state.
18.5.5
Receiver Error Flags
When the EUSART is not configured in Manchester mode, the EUSART has the three same errors flags as stan-
dard mode: Frame Error (FE), Data OverRun (DOR) and Parity Error (UPE). All can be accessed by reading
When the EUSART is configured in Machester mode, the EUSART has two errors flags: Data OverRun (DOR),
and Manchester framing error (FEM bit of EUCSRC).
All the receiver error flags are valid only when the RxC bit is set and until the UDR register is read.
Assembly Code Example(1)
EUSART_Receive:
; Wait for data to be received
sbis
UCSRA, RXC
rjmp
EUSART_Receive
; Get MSB (r15), LSB (r16)
lds
r15, EUDR
lds
r16, UDR
ret
C Code Example
(1)
unsigned int
EUSART_Receive( void )
{
unsigneg int rx_data
/* Wait for data to be received */
while
( !(UCSRA & (1<<RXC)) )
;
/* Get and return received data from buffer */
rx_data=EUDR;
rx_data=rx_data<<8+UDR;
return
rx_data;
}