247
AT90PWM216/316 [DATASHEET]
7710H–AVR–07/2013
Bit 6:4 – DATS2, DATS1, DATS0: DAC Trigger Selection bits
These bits are only necessary in case the DAC works in auto trigger mode. It means if DAATE bit is set.
In accordance with the
Table 21-1, these 3 bits select the interrupt event which will generate the update of the DAC
input values. The update will be generated by the rising edge of the selected interrupt flag whether the interrupt is
enabled or not.
Bit 2 – DALA: Digital to Analog Left Adjust
Set this bit to left adjust the DAC input data.
Clear it to right adjust the DAC input data.
The DALA bit affects the configuration of the DAC data registers. Changing this bit affects the DAC output on the
next DACH writing.
Bit 1 – DAOE: Digital to Analog Output Enable bit
Set this bit to output the conversion result on D2A,
Clear it to use the DAC internally.
Bit 0 – DAEN: Digital to Analog Enable bit
Set this bit to enable the DAC,
Clear it to disable the DAC.
21.4.2
Digital to Analog Converter input Register – DACH and DACL
DACH and DACL registers contain the value to be converted into analog voltage.
Writing the DACL register forbid the update of the input value until DACH has not been written too. So the normal
way to write a 10-bit value in the DAC register is firstly to write DACL the DACH.
In order to work easily with only 8 bits, there is the possibility to left adjust the input value. Like this it is sufficient to
write DACH to update the DAC value.
21.4.2.1
DALA = 0
Table 21-1.
DAC Auto Trigger source selection
DATS2
DATS1
DATS0
Description
0
Analog comparator 0
0
1
Analog comparator 1
0
1
0
External Interrupt Request 0
0
1
Timer/Counter0 Compare Match
1
0
Timer/Counter0 Overflow
1
0
1
Timer/Counter1 Compare Match B
1
0
Timer/Counter1 Overflow
1
Timer/Counter1 Capture Event
Bit
7
654
3
2
1
0
-
DAC9
DAC8
DACH
DAC7
DAC6
DAC5
DAC4
DAC3
DAC2
DAC1
DAC0
DACL
Read/Write
R/W
Initial Value
0
000
0