參數(shù)資料
型號： MR80C52XXX-36P883R
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44
封裝： LCC-44
文件頁數(shù)： 27/132頁
文件大?。?/td> 10886K
代理商： MR80C52XXX-36P883R
196
ATmega8535(L)
2502K–AVR–10/06
Table 77. Status Codes for Slave Receiver Mode
Status Code
(TWSR)
Prescaler Bits
are 0
Status of the Two-wire Serial Bus
and Two-wire Serial Interface
Hardware
Application Software Response
Next Action Taken by TWI Hardware
To/from TWDR
To TWCR
STA
STO
TWINT
TWEA
0x60
Own SLA+W has been received;
ACK has been returned
No TWDR action or
No TWDR action
X
0
1
0
1
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
0x68
Arbitration lost in SLA+R/W as
Master; own SLA+W has been
received; ACK has been returned
No TWDR action or
No TWDR action
X
0
1
0
1
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
0x70
General call address has been
received; ACK has been returned
No TWDR action or
No TWDR action
X
0
1
0
1
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
0x78
Arbitration lost in SLA+R/W as
Master; General call address has
been received; ACK has been
returned
No TWDR action or
No TWDR action
X
0
1
0
1
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
0x80
Previously addressed with own
SLA+W; data has been received;
ACK has been returned
Read data byte or
Read data byte
X
0
1
0
1
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
0x88
Previously addressed with own
SLA+W; data has been received;
NOT ACK has been returned
Read data byte or
Read data byte
0
1
0
1
0
1
0
1
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
0x90
Previously addressed with
general call; data has been re-
ceived; ACK has been returned
Read data byte or
Read data byte
X
0
1
0
1
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
0x98
Previously addressed with
general call; data has been
received; NOT ACK has been
returned
Read data byte or
Read data byte
0
1
0
1
0
1
0
1
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
0xA0
A STOP condition or repeated
START condition has been
received while still addressed as
Slave
No action
0
1
0
1
0
1
0
1
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
相關PDF資料
PDF描述
MQ80C52XXX-36SHXXX 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQFP44
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參數(shù)描述
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