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MSM66573 Family User's Manual
Chapter 8 General-Purpose 8/16 Bit Timers
8.5.2 Description of Timer 3 Registers
(1)
General-purpose 8-bit timer 3 counter (TM3C)
The general-purpose 8-bit timer 3 counter (TM3C) is an 8-bit up-counter. When this counter
overflows, an interrupt request is generated and it is loaded with the contents of general-
purpose 8-bit timer 3 register (TM3R). TM3C can also be used as a baud rate generator
for SIO0.
TM3C can be read from and written to by the program.
When reset (
RES signal input, execution of a BRK instruction, overflow of the watchdog
timer, opcode trap), the contents of TM3C are undefined.
[Note]
Writing a timer value to TM3C causes the same value to also be written to the general-
purpose 8-bit timer 3 register (TM3R).
(2)
General-purpose 8-bit timer 3 register (TM3R)
The general-purpose 8-bit timer 3 register (TM3R) consists of 8 bits. This register stores
the value to be reloaded into the general-purpose 8-bit timer 3 counter (TM3C).
TM3R can be read from and written to by the program.
When reset (
RES signal input, execution of a BRK instruction, overflow of the watchdog
timer, opcode trap), the contents of TM3R are undefined.
(3)
General-purpose 8-bit timer 3 control register (TM3CON)
The general-purpose 8-bit timer 3 control register (TM3CON) consists of 5 bits. Bits 0 to
2 (TM3C0 to TM3C2) of TM3CON select the timer 3 count clock, bit 3 (TM3RUN) starts or
halts the counting, and bit 7 (TM3OUT) specifies the initial timer output level (High or Low)
at start-up. And each time TM3C overflows, the content of bit 7 (TM3OUT) is reversed.
TM3CON can be read from and written to by the program. However, write operations are
invalid for bits 4 to 6. If read, a value of "1" will always be obtained for bits 4 to 6.
When reset (
RES signal input, execution of a BRK instruction, overflow of the watchdog
timer, opcode trap), TM3CON becomes 70H.
Figure 8-5 shows the TM3CON configuration.
[Note]
Just before TM3C overflows, if an SB, RB, XORB or other read-modify-write instruction
is performed on TM3CON, then TM3OUT may not operate correctly.