19/29
Semiconductor
MSM82C59A-2RS/GS/JS
FEDL82C59A-2-03
(7)
Fully Nested Mode
As long as the MSM82C59A-2 has not been programmed to another mode, this Fully
Nested mode is set automatically after initialization. The interrupt requests are ordered
in priority sequentially from 0 to 7 (where 0 represents highest priority). If an interrupt is
then requested and is acknowledged highest priority, a corresponding vector address is
released, and the corresponding bit in the in-service register (ISR) is set. The IS bit remains
set until an End of Interrupt (EOI) command is issued from the microprocessor before
returning from the interrupt service routine, or until the rising edge of the last INTA pulse
arrives when the AEOI bit has been set.
When the IS bit is set, interrupts of the same or lower priority are inhibited - only interrupts
of higher priority can be generated. In this case, interrupts can be acknowledged only
when the internal interrupt enable F/F in the microprocessor has been enabled again
through software. Following the initialization sequence, IR0 has the highest priority, and
IR7 has the lowest. This priority can be changed by rotating priority mode in OCW2.
(8)
End of Interrupt (EOI)
When the AEOI bit in ICW4 is set, the in-service (IS) bit is automatically reset by the rising
edge of the last INTA pulse, or else is reset only when an EOI command is issued to the
MSM82C59A-2 prior to returning from the interrupt service routine.
And in cascade mode, the EOI command must be issued twice - once for the master, and
once for the corresponding slave.
EOI commands are classified into specific EOI commands and Non-Specific EOI commands.
When the MSM82C59A-2 is operated in Fully Nested mode, the IS bit to be reset can be
determined on EOI. If the Non-Specific EOI command is issued, the highest IS bit of those
that are set is reset automatically, because the highest IS level is always the last servicing
level in the Fully Nested mode, the MSM82C59A-2 will no longer be able to determine the
last acknowledged level. In this case, it will be necessary to issue a Specific EOI which
includes the IS level to be reset as part of the command. When the MSM82C59A-2 is in
Special Mask mode, care must be taken to ensure that IS bits masked by the IMR bit can
not reset by the Non-Specific EOI.
(9)
Automatic End of Interrupt (AEOI) Mode
When AEOI = 1 in ICW4, the MSM82C59A-2 continues to operate in AEOI mode until
programmed again by ICW4. In this mode, the MSM82C59A-2 automatically performs
Non-Specific EOI operation at the rising edge of the last INTA pulse (the third pulse in 85
systems, and the second pulse in 86 systems). In terms of systems, this mode is best used
in nested multiple level interrupt configurations. It is not necessary when there is only one
MSM82C59A-2. AEOI mode is only used in a master MSM82C59A-2 device, not in a slave.
(10) Automatic Rotation (Devices with Equal Priority)
In some applications, there is often a number of devices with equal priority. In this mode,
the device where an interrupt service has just been completed is set to the lowest priority.
At worst, therefore, a particular interrupt request device may have to wait for seven other
devices to be serviced at least once each. There are two methods for Automatic Rotation
using OCW2 - Rotation on Non-Specific EOI command, and Rotation in Automatic EOI
mode.