參數(shù)資料
型號： MSP430A018IPN
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PQFP80
封裝： GREEN, PLASTIC, QFP-80
文件頁數(shù)： 6/73頁
文件大?。?/td> 1284K
代理商： MSP430A018IPN
MSP430FG43x
MIXED SIGNAL MICROCONTROLLER
SLAS380B APRIL 2004 REVISED JUNE 2007
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
LCD drive
The LCD driver generates the segment and common signals required to drive an LCD display. The LCD
controller has dedicated data memory to hold segment drive information. Common and segment signals are
generated as defined by the mode. Static, 2-MUX, 3-MUX, and 4-MUX LCDs are supported by this peripheral.
OA
The MSP430FG43x has three configurable low-current general-purpose operational amplifiers. Each OA input
and output terminal is software-selectable and offers a flexible choice of connections for various applications.
The OA op amps primarily support front-end analog signal conditioning prior to analog-to-digital conversion.
watchdog timer
The primary function of the watchdog timer (WDT) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be configured as an interval timer and can generate
interrupts at selected time intervals.
USART0
The MSP430FG43x has one hardware universal synchronous/asynchronous receive transmit (USART)
peripheral module that is used for serial data communication. The USART supports synchronous SPI (3 or 4
pin) and asynchronous UART communication protocols, using double-buffered transmit and receive channels.
timer_A3
Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
Timer_A3 Signal Connections
Input Pin Number
Device Input
Module Input
Module
Module Output
Output Pin Number
PN
Device Input
Signal
Module Input
Name
Module
Block
Module Output
Signal
PN
62 - P1.5
TACLK
ACLK
Timer
NA
SMCLK
Timer
NA
62 - P1.5
TACLK
INCLK
67 - P1.0
TA0
CCI0A
67 - P1.0
66 - P1.1
TA0
CCI0B
CCR0
TA0
DVSS
GND
CCR0
TA0
DVCC
VCC
65 - P1.2
TA1
CCI1A
65 - P1.2
CAOUT (internal)
CCI1B
CCR1
TA1
ADC12 (internal)
DVSS
GND
CCR1
TA1
DVCC
VCC
59 - P2.0
TA2
CCI2A
59 - P2.0
ACLK (internal)
CCI2B
CCR2
TA2
DVSS
GND
CCR2
TA2
DVCC
VCC
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