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| 型號： | MSP430C1351IPM |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 8 MHz, RISC MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數(shù)： | 23/35頁 |
| 文件大小： | 530K |
| 代理商： | MSP430C1351IPM |
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MSP430C13x1
MIXED SIGNAL MICROCONTROLLER
SLAS341B SEPTEMBER 2001 REVISED SEPTEMBER 2004
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagrams
MSP430C13x1
Oscillator
ACLK
SMCLK
CPU
Incl. 16 Reg.
Bus
Conv
MCB
XIN XOUT/TCLK
P3
P4
P2
XT2IN
XT2OUT
TMS
TCK
MDB, 16 Bit
MAB, 16 Bit
MCLK
4
TDI
TDO/TDI
P5
P6
MAB,
4 Bit
DVCC
DVSS
AVCC
AVSS RST/NMI
System
Clock
ROSC
P1
16KB ROM
8KB ROM
512B RAM
256B RAM
Watchdog
Timer
15/16-Bit
Timer_B3
3 CC Reg
Shadow
Reg
Timer_A3
3 CC Reg
Test
JTAG
Emulation
Module
I/O Port 1/2
16 I/Os,
with
Interrupt
Capability
I/O Port 3/4
16 I/Os
POR
Comparator
A
USART0
UART Mode
SPI Mode
I/O Port 5/6
16 I/Os
MDB, 8 Bit
MDB, 16-Bit
MAB, 16-Bit
8
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
AVCC
64
Supply voltage, positive terminal. AVCC and DVCC are internally connected together.
AVSS
62
Supply voltage, negative terminal. AVSS and DVSS are internally connected together.
DVCC
1
Supply voltage, positive terminal. AVCC and DVCC are internally connected together.
DVSS
63
Supply voltage, negative terminal. AVSS and DVSS are internally connected together.
P1.0/TACLK
12
I/O
General-purpose digital I/O pin/Timer_A, clock signal TACLK input
P1.1/TA0
13
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI0A input, compare: Out0 output
P1.2/TA1
14
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI1A input, compare: Out1 output
P1.3/TA2
15
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI2A input, compare: Out2 output
P1.4/SMCLK
16
I/O
General-purpose digital I/O pin/SMCLK signal output
P1.5/TA0
17
I/O
General-purpose digital I/O pin/Timer_A, compare: Out0 output
P1.6/TA1
18
I/O
General-purpose digital I/O pin/Timer_A, compare: Out1 output
P1.7/TA2
19
I/O
General-purpose digital I/O pin/Timer_A, compare: Out2 output
P2.0/ACLK
20
I/O
General-purpose digital I/O pin/ACLK output
P2.1/TAINCLK
21
I/O
General-purpose digital I/O pin/Timer_A, clock signal at INCLK
P2.2/CAOUT/TA0
22
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI0B input/Comparator_A output
P2.3/CA0/TA1
23
I/O
General-purpose digital I/O pin/Timer_A, compare: Out1 output/Comparator_A input
P2.4/CA1/TA2
24
I/O
General-purpose digital I/O pin/Timer_A, compare: Out2 output/Comparator_A input
P2.5/ROSC
25
I/O
General-purpose digital I/O pin/input for external resistor defining the DCO nominal frequency
P2.6
26
I/O
General-purpose digital I/O pin
P2.7/TA0
27
I/O
General-purpose digital I/O pin/Timer_A, compare: Out0 output
P3.0/STE0
28
I/O
General-purpose digital I/O pin/slave transmit enable – USART0/SPI mode
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