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參數(shù)資料
| 型號： | MSP430C1351IPM |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 8 MHz, RISC MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數(shù)： | 35/35頁 |
| 文件大?。?/td> | 530K |
| 代理商： | MSP430C1351IPM |
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MSP430C13x1
MIXED SIGNAL MICROCONTROLLER
SLAS341B SEPTEMBER 2001 REVISED SEPTEMBER 2004
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
76
5
4
0
32
1
Address
05h
rw-0,1:
Legend: rw:
Bit Can Be Read and Written
Bit Can Be Read and Written. It Is Reset or Set by PUC.
Bit Can Be Read and Written. It Is Reset or Set by POR.
SFR Bit Not Present in Device
rw-(0,1):
memory organization
MSP430C1331
MSP430C1351
Memory
Interrupt vector
Code memory
Size
ROM
8KB
0FFFFh 0FFE0h
0FFFFh 0E000h
16KB
0FFFFh 0FFE0h
0FFFFh 0C000h
RAM
Size
256 Byte
02FFh 0200h
512 Byte
03FFh 0200h
Peripherals
16-bit
8-bit
8-bit SFR
01FFh 0100h
0FFh 010h
0Fh 00h
01FFh 0100h
0FFh 010h
0Fh 00h
peripherals
Peripherals are connected to the CPU through data, address, and control busses and can be handled using
all instructions. For complete module descriptions, see the MSP430x1xx Family User’s Guide, literature number
SLAU049.
digital I/O
There are six 8-bit I/O ports implemented—ports P1 through P6:
D All individual I/O bits are independently programmable.
D Any combination of input, output, and interrupt conditions is possible.
D Edge-selectable interrupt input capability for all the eight bits of ports P1 and P2.
D Read/write access to port-control registers is supported by all instructions.
oscillator and system clock
The clock system is supported by the basic clock module that includes support for a 32768-Hz watch crystal
oscillator, an internal digitally-controlled oscillator (DCO) and a high frequency crystal oscillator. The basic clock
module is designed to meet the requirements of both low system cost and low-power consumption. The internal
DCO provides a fast turn-on clock source and stabilizes in less than 6
s. The basic clock module provides the
following clock signals:
D Auxiliary clock (ACLK), sourced from a 32768-Hz watch crystal or a high frequency crystal.
D Main clock (MCLK), the system clock used by the CPU.
D Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.
watchdog timer
The primary function of the watchdog timer (WDT) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be configured as an interval timer and can generate
interrupts at selected time intervals.
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