參數(shù)資料
型號: MSP430F2618TGQWTEP
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PBGA113
封裝: PLASTIC, BGA-113
文件頁數(shù): 7/92頁
文件大?。?/td> 1215K
代理商: MSP430F2618TGQWTEP
MSP430F2618- EP
MIXED SIGNAL MICROCONTROLLER
SLAS632 -- DECEMBER 2008
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
calibration data stored in information memory segment A
Calibration data is stored for the DCO and for the ADC12. It is organized in a tag-length-value (TLV) structure.
TAGS USED BY THE ADC CALIBRATION TAGS
NAME
ADDRESS
VALUE
DESCRIPTION
TAG_DCO_30
0x10F6
0x01
DCO frequency calibration at VCC = 3 V and TA =25C at calibration
TAG_ADC12_1
0x10DA
0x10
ADC12_1 calibration tag
TAG_EMPTY
--
0xFE
Identifier for empty memory areas
LABELS USED BY THE ADC CALIBRATION TAGS
LABEL
CONDITION AT CALIBRATION / DESCRIPTION
SIZE
ADDRESS OFFSET
CAL_ADC_25T85 INCHx = 0x1010; REF2_5 = 1, TA =85C
word
0x000E
CAL_ADC_25T30 INCHx = 0x1010; REF2_5 = 1, TA =30C
word
0x000C
CAL_ADC_25VREF_FACTOR REF2_5 = 1, TA =30C
word
0x000A
CAL_ADC_15T85 INCHx = 0x1010; REF2_5 = 0, TA =85C
word
0x0008
CAL_ADC_15T30 INCHx = 0x1010; REF2_5 = 0, TA =30C
word
0x0006
CAL_ADC_15VREF_FACTOR REF2_5 = 0, TA =30C
word
0x0004
CAL_ADC_OFFSET External VREF =1.5 V, fADC12CLK =5MHz
word
0x0002
CAL_ADC_GAIN_FACTOR External VREF =1.5 V, fADC12CLK =5MHz
word
0x0000
CAL_BC1_1MHZ --
byte
0x0007
CAL_DCO_1MHZ --
byte
0x0006
CAL_BC1_8MHZ --
byte
0x0005
CAL_DCO_8MHZ --
byte
0x0004
CAL_BC1_12MHZ --
byte
0x0003
CAL_DCO_12MHZ --
byte
0x0002
CAL_BC1_16MHZ --
byte
0x0001
CAL_DCO_16MHZ --
byte
0x0000
brownout, supply voltage supervisor (SVS)
The brownout circuit is implemented to provide the proper internal reset signal to the device during power on
and power off. The SVS circuitry detects if the supply voltage drops below a user selectable level and supports
both supply voltage supervision (the device is automatically reset) and supply voltage monitoring (SVM) (the
device is not automatically reset).
The CPU begins code execution after the brownout circuit releases the device reset. However, VCC may not
have ramped to VCC(min) at that time. The user must ensure that the default DCO settings are not changed until
VCC reaches VCC(min). If desired, the SVS circuit can be used to determine when VCC reaches VCC(min).
digital I/O
There are up to eight 8-bit I/O ports implemented—ports P1 through P8:
D
All individual I/O bits are independently programmable.
D
Any combination of input, output, and interrupt conditions is possible.
D
Edge-selectable interrupt input capability for all eight bits of ports P1 and P2.
D
Read/write access to port-control registers is supported by all instructions.
D
Each I/O has an individually programmable pullup/pulldown resistor.
D
Ports P7/P8 can be accessed word-wise.
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