參數(shù)資料
型號(hào): MT18JSF25672AY-1G1D1
元件分類: DRAM
英文描述: 256M X 72 DDR DRAM MODULE, DMA240
封裝: UDIMM-240
文件頁(yè)數(shù): 18/19頁(yè)
文件大?。?/td> 644K
代理商: MT18JSF25672AY-1G1D1
PDF: 09005aef83606b46/Source: 09005aef83606afe
Micron Technology, Inc., reserves the right to change products or specifications without notice.
JSF18C256x72AZ.fm - Rev. A 9/08 EN
8
2008 Micron Technology, Inc. All rights reserved
2GB (x72, ECC, DR) 240-Pin DDR3 SDRAM UDIMM
Electrical Specifications
Stresses greater than those listed in Table 6 may cause permanent damage to the
module. This is a stress rating only, and functional operation of the module at these or
any other conditions outside those indicated in each device’s data sheet is not implied.
Exposure to absolute maximum rating conditions for extended periods may adversely
affect reliability.
Notes:
1. Vtt termination voltage in excess of the stated limit will adversely affect the command and
address signals’ voltage margin and will reduce timing margins.
2. TA and TC are simultaneous requirements.
3. For further information, refer to technical note TN-00-08: ”Thermal Applications,” available
on Micron’s Web site.
4. The refresh rate is required to double when 85°C < TC ≤ 95°C.
Table 6:
Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Units
Vdd
Vdd supply voltage relative to Vss
–0.4
+1.975
V
Vin, Vout
Voltage on any pin relative to Vss
–0.4
+1.975
V
Table 7:
Operating Conditions
Symbol Parameter
Min
Nom
Max
Units Notes
Vdd
Vdd supply voltage
1.425
1.5
1.575
V
Ivtt
Termination reference current from Vtt
–600
+600
mA
Vtt
Termination reference voltage (DC) –
command/address bus
0.49 × Vdd - 20mV 0.5 × Vdd 0.51 × Vdd + 20mV
V
Ii
Input leakage current;
Any input 0V
≤ Vin ≤ Vdd;
Vref input 0V
≤ Vin ≤ 0.95V
(All other pins not under
test = 0V)
Address
inputs,
RAS#, CAS#,
WE#, BA
–36
0
+36
A
S#, CKE,
ODT, CK,
CK#
–18
0
+18
DM
–4
0
+4
Ioz
Output leakage current;
0V
≤ Vout ≤ VddQ;
DQ and ODT are disabled;
ODT is HIGH
DQ, DQS,
DQS#
–10
0
+10
A
Ivref
VREF supply leakage current;
VREFDQ = VDD/2 or VREFCA = VDD/2
(All other pins not under test = 0V)
–18
0
+18
A
TA
Module ambient operating
temperature
Commercial
0
+70
°C
Industrial
–40
+85
°C
TC
DDR3 SDRAM component case
operating temperature
Commercial
0
+85
°C
Industrial
–40
+95
°C
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