參數(shù)資料
型號: MT36JSZF51272PDY-1G6XX
元件分類: DRAM
英文描述: 512M X 72 DDR DRAM MODULE, DMA240
封裝: LEAD FREE, MO-269, RDIMM-240
文件頁數(shù): 16/20頁
文件大小: 441K
代理商: MT36JSZF51272PDY-1G6XX
Table 5: Pin Descriptions (Continued)
Symbol
Type
Description
SDA
I/O
Serial data: Used to transfer addresses and data into and out of the temperature sensor/
SPD EEPROM on the I2C bus.
TDQSx,
TDQSx#
Output
Redundant data strobe (x8 devices only): TDQS is enabled/disabled via the LOAD
MODE command to the extended mode register (EMR). When TDQS is enabled, DM is
disabled and TDQS and TDQS# provide termination resistance; otherwise, TDQS# are
no function.
Err_Out#
Output
(open drain)
Parity error output: Parity error found on the command and address bus.
EVENT#
Output
(open drain)
Temperature event:The EVENT# pin is asserted by the temperature sensor when crit-
ical temperature thresholds have been exceeded.
VDD
Supply
Power supply: 1.5V ±0.075V. The component VDD and VDDQ are connected to the mod-
ule VDD.
VDDSPD
Supply
Temperature sensor/SPD EEPROM power supply: 3.0–3.6V.
VREFCA
Supply
Reference voltage: Control, command, and address VDD/2.
VREFDQ
Supply
Reference voltage: DQ, DM VDD/2.
VSS
Supply
Ground.
VTT
Supply
Termination voltage: Used for control, command, and address VDD/2.
NC
No connect: These pins are not connected on the module.
NF
No function: These pins are connected within the module, but provide no functionality.
4GB (x72, ECC, QR) 240-Pin DDR3 SDRAM RDIMM
Pin Descriptions
PDF: 09005aef8343b5fe
jszf36c512x72pdy.pdf - Rev. D 3/11 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2008 Micron Technology, Inc. All rights reserved.
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