參數(shù)資料
型號(hào): MT58L128L36D1T-5IT
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 128K X 36 STANDARD SRAM, 2.8 ns, PQFP100
封裝: PLASTIC, MS-026BHA, TQFP-100
文件頁(yè)數(shù): 12/23頁(yè)
文件大小: 604K
代理商: MT58L128L36D1T-5IT
2
4Mb: 256K x 18, 128K x 32/36 3.3V I/O Pipelined, DCD SyncBurst SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT58L256L18D1.p65 – Rev 12/99
1999, Micron Technology, Inc.
4Mb: 256K x 18, 128K x 32/36
3.3V I/O PIPELINED, DCD SYNCBURST SRAM
PRELIMINARY
FUNCTIONAL BLOCK DIAGRAM
256K x 18
SA0, SA1, SA
ADDRESS
REGISTER
ADV#
CLK
BINARY
COUNTER AND
LOGIC
CLR
Q1
Q0
ADSC#
18
16
18
BWb#
BWa#
CE#
18
BYTE “b”
WRITE REGISTER
BYTE “a”
WRITE REGISTER
ENABLE
REGISTER
18
SA0'
SA1'
OE#
SENSE
AMPS
256K x 9 x 2
MEMORY
ARRAY
ADSP#
9
2
SA0-SA1
MODE
CE2
CE2#
GW#
BWE#
PIPELINED
ENABLE
DQs
DQPa
DQPb
2
18
OUTPUT
REGISTERS
INPUT
REGISTERS
18
E
18
BYTE “b”
WRITE DRIVER
BYTE “a”
WRITE DRIVER
OUTPUT
BUFFERS
9
NOTE: Functional block diagrams illustrate simplified device operation. See truth tables, pin descriptions and timing diagrams
for detailed information.
FUNCTIONAL BLOCK DIAGRAM
128K x 32/36
ADDRESS
REGISTER
ADV#
CLK
BINARY
COUNTER
CLR
Q1
Q0
ADSP#
ADSC#
MODE
17
15
17
BWd#
BWc#
BWb#
BWa#
BWE#
GW#
CE#
CE2
CE2#
OE#
BYTE “d”
WRITE REGISTER
BYTE “c”
WRITE REGISTER
BYTE “b”
WRITE REGISTER
BYTE “a”
WRITE REGISTER
ENABLE
REGISTER
PIPELINED
ENABLE
4
OUTPUT
REGISTERS
SENSE
AMPS
128K x 8 x 4
(x32)
128K x 9 x 4
(x36)
MEMORY
ARRAY
OUTPUT
BUFFERS
E
BYTE “a”
WRITE DRIVER
BYTE “b”
WRITE DRIVER
BYTE “c”
WRITE DRIVER
BYTE “d”
WRITE DRIVER
INPUT
REGISTERS
SA0, SA1, SA
SA0'
SA1'
SA0-SA1
DQs
DQPa
DQPd
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