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參數(shù)資料
| 型號： | MT58L128L36D1T-5IT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 128K X 36 STANDARD SRAM, 2.8 ns, PQFP100 |
| 封裝： | PLASTIC, MS-026BHA, TQFP-100 |
| 文件頁數(shù)： | 9/23頁 |
| 文件大?。?/td> | 604K |
| 代理商： | MT58L128L36D1T-5IT |
17
4Mb: 256K x 18, 128K x 32/36 3.3V I/O Pipelined, DCD SyncBurst SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT58L256L18D1.p65 – Rev 12/99
1999, Micron Technology, Inc.
4Mb: 256K x 18, 128K x 32/36
3.3V I/O PIPELINED, DCD SYNCBURST SRAM
PRELIMINARY
Q
50
V = 1.5V
Z = 50
O
T
Figure 1
LOAD DERATING CURVES
Micron 256K x 18, 128K x 32, and 128K x 36
SyncBurst SRAM timing is dependent upon the capaci-
tive loading on the outputs.
Consult the factory for copies of I/O current versus
voltage curves.
Q
351
317
5pF
+3.3V
Figure 2
AC TEST CONDITIONS
Input pulse levels .................. VIH = (VDD/2.2) + 1.5V
.................... VIL = (VDD/2.2) - 1.5V
Input rise and fall times .................................... 1ns
Input timing reference levels ...................... VDD/2.2
Output reference levels ............................ VDDQ/2.2
Output load ............................. See Figures 1 and 2
Output Load Equivalents
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PDF描述 |
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| MT58L32L36PT-7.5 | 32K X 36 CACHE SRAM, 4.2 ns, PQFP100 |
| MT58L512L18DS-7.5IT | 512K X 18 CACHE SRAM, 4 ns, PQFP100 |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT58L128L36F1 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:4Mb: 256K x 18, 128K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
| MT58L128L36F1T-10 | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Quad 3.3V 4M-Bit 128K x 36 10ns 100-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT58L128L36F1T-10 TR | 制造商:Cypress Semiconductor 功能描述:128KX36 SRAM PLASTIC TQFP 3.3V |
| MT58L128L36F1T-8.5 | 制造商:Cypress Semiconductor 功能描述:128KX36 SRAM PLASTIC TQFP 3.3V 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT58L128L36F1T-8.5C | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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