參數(shù)資料
型號: MT9074
廠商: Mitel Networks Corporation
英文描述: T1/E1/J1 Single Chip Transceiver(T1/E1/J1單片收發(fā)器)
中文描述: T1/E1/J1收發(fā)單芯片收發(fā)器(T1/E1/J1收發(fā)單片收發(fā)器)
文件頁數(shù): 67/120頁
文件大?。?/td> 362K
代理商: MT9074
Advance Information
MT9074
67
Bit
Name
Functional Description
7
TXMSG
Transmit Message Mode.
If high,
the data contained in the Transmit
Message Register (address 18H,
page 1) is transmitted in the
corresponding DS1 time slot. If
zero, the data on DSTi is
transmitted on the corresponding
DS1 time slot.
6
PCI
Per Channel Inversion.
When set
high the data for this channel
sourced from DSTi is inverted
before being transmit onto the
equivalent DS1 channel; the data
received from the incoming DS1
channel is inverted before it
emerges from DSTo.
5
RTSL
Remote Time Slot Loopback.
If
one,
the
corresponding
receive time slot is looped to the
corresponding DS1 transmit time
slot. This received time slot will
also be present on DSTo. If zero,
the loopback is disabled.
DS1
4
LTSL
Local Time Slot Loopback.
If
one, the corresponding transmit
time
slot
is
corresponding receive time slot.
This transmit time slot will also be
present on the transmit DS1
stream. If zero, this loopback is
disabled.
looped
to
the
3
TTST
Transmit Test.
If one, a test
signal, either digital milliwatt (when
control bit ADSEQ is one) or
PRBS (Z
15
-1) (ADSEQ is zero),
will
be
transmitted
corresponding DS1 time slot. More
than one time slot may be
activated at once. If zero, the test
signal will not be connected to the
corresponding time slot.
in
the
2
RTST
Receive
corresponding DSTo time slot will
be used for testing. If control bit
ADSEQ is one, a digital milliwatt
signal will be transmitted into the
DSTo channel. If ADSEQ is zero,
the
receive
channel
connected to the PRBS (2
15
- 1)
detector.
Test.
If
one,
the
will
be
Table 75 - Per Time Slot Control Words
(Pages 7 and 8) (T1)
1
RPSIG
Serial Signaling Enable.
If set
low, the transmit signaling buffer
for the equivalent DS1 channel will
be sourced from the ST-BUS
channel on CSTi associated with
it. If set high the transmit signaling
RAM must be programmed via the
microport.
0
CC
Clear Channel.
When set high no
robbed bit signaling is inserted in
the
equivalent
channel. When set low robbed bit
signaling is included in every 6th
channel.
transmit
DS1
Bit
Name
Functional Description
Table 75 - Per Time Slot Control Words
(Pages 7 and 8) (T1)
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