參數(shù)資料
型號(hào): MT92220
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數(shù)字傳輸電路
英文描述: 1023 Channel Voice Over IP/AAL2 Processor
中文描述: ATM NETWORK INTERFACE, PBGA608
封裝: 31 X 31 MM, 2.50 MM HEIGHT, MS-034, EPBGA-608
文件頁數(shù): 33/210頁
文件大小: 1536K
代理商: MT92220
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁當(dāng)前第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁
Data Sheet
MT92220
33
Zarlink Semiconductor Inc.
5.5
Packet Reassembly
When communicating only IP packets, the MT92220 can use Ethernet, Packet over SONET or ATM as its primary
network interface. When using AAL2 (and potentially IP at the same time), the primary interface must be a UTOPIA
bus. This is used to carry AAL2 cells, other ATM cells that can carry signaling, and packets broken down and
carried over AAL5. Any packets transmitted or received over AAL5 on the link will be done so one cell at a time,
contrarily to Ethernet and Packet over SONET, which both transfer and receive entire IP packets. On the
transmission side, this is not a problem: each packet is broken down into as many AAL5 cells as necessary and the
cells are then sent one at a time over UTOPIA.
The reception side is a little trickier: as ATM cells are received, they must be targeted to a connection in order to
determine if they are AAL2, AAL5 carrying IP or another protocol, or "raw" cells which will be routed to another port
or to software. To do so, the chip consults an ATM header look-up table. The look-up table is contained in external
SSRAM and can use up to 16 header bits to determine the destination of the cell. The result of this look-up points to
a destination field for non-OAM cells as well as one for OAM cells (note that OAM cells cannot be AAL2 or AAL5).
The cells are then sent to their appropriate destinations. If the cells are AAL2 or AAL5, an AAL2/AAL5 VC structure
base number is also listed.
The AAL5 reassembly structure contains all information about the current packet and the connection to which it
belongs, such as the number of cells contained in the packet so far, and diagnostic information indicating how many
bytes, cells and packets have been received on this connection since start-up. It also contains a Flow Table Pointer:
this pointer uniquely identifies a Flow, which corresponds to a logical subnet number. The Flow Table Pointer can
be modified later in the packet's life according to any MPOA tags, MPLS labels or ELAN-IDs it may contain. If none
of these modifications have taken place, then the Flow Table Pointer corresponds directly to the VC number.
When the last cell is received and the packet is reassembled successfully, the complete packet is checked for
correct length and correct CRC: an error in either of these will cause it to be discarded. If the packet passes these
tests, it will be sent to the packet identification queue, where it will be routed to its final destination.
When the packet is ready to be treated, the look-up table will indicate whether it is a data packet, or it needs to be
sent through the regular IP packet flow. It is to be noted that, to save overhead, some implementations eliminate
IP/UDP headers to save bandwidth. Like all other network interfaces, AAL5 can also support voice packets both
with and without RTP headers. If the IP/UDP packet routing is chosen and the IP header is present, the look-up
proceeds using the IP and UDP headers (and possibly the RTP synchronization source) to identify the packet.
However, if the IP and UDP headers are absent, the 24-bit Flow Table Pointer is added to the binary tree look-up
key. Only the RTP SSRC can be used along the Flow Table Pointer in the search, as long as RTP is present in the
packet. Otherwise, the packet will be looked-up using only the Flow Table Pointer.
IP packets carried over AAL5 can be encapsulated using Classical IP over ATM or LANE version 1 or 2. Classical
IP over ATM uses an 8-byte SNAP/LLC header at the beginning of the packet to identify the type of the packet (e.g.
IP). Packets using LANE have an Ethernet-compatible header before the IP header, containing the Destination and
Source MAC addresses corresponding to the packet, as well as an Ethernet Length/Type field that, in the same
way as the SNAP/LLC type, identifies the protocol above it (IP or other). LANE v2 also uses LLC encapsulation and
contains an ELAN-ID that may be used to resolve a logical subnet number. LANE headers may be compatible to
Ethernet p/Q. The Destination MAC address in the LANE header will be checked in the same way as it would be in
an Ethernet packet: the chip will accept MAC addresses corresponding to its own, as well as broadcast MAC
addresses. MAC address checking can also be disabled and all packets will be accepted.
When the primary network interface is configured as Ethernet or Packet over SONET, a single Reassembly
structure is used and all packets are routed to this structure. Since Ethernet and Packet over SONET do not break
down packets, interleave them, or carry several packets over different VC, the packets always arrive contiguously,
thus not requiring more than 1 structure.
相關(guān)PDF資料
PDF描述
MT9300B Multi-Channel Voice Echo Canceller
MT9300BL Multi-Channel Voice Echo Canceller
MT9300BV Multi-Channel Voice Echo Canceller
MT9315 CMOS Acoustic Echo Canceller
MT933 3.3V 10/100 Fast Ethernet Transceiver to MII
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT92220BG 制造商:Microsemi Corporation 功能描述:
MT9234MU 功能描述:MODEM V.92 DATA/FAX USB WORLD RoHS:是 類別:計(jì)算機(jī),辦公室 - 元件,配件 >> 調(diào)制解調(diào)器 系列:MultiMobile™ USB 標(biāo)準(zhǔn)包裝:1 系列:MultiModem® ZBA 數(shù)據(jù)格式:V.34,V.92 波特率:- 電源電壓:- 安裝類型:臺(tái)式 封裝/外殼:5.7" L x 4.3" W x 1.0" H(145mm x 109mm x 25mm) 供應(yīng)商設(shè)備封裝:- 包裝:散裝
MT9234MU-CDC 功能描述:MODEM V.92 DATA/FAX USB WORLD RoHS:是 類別:計(jì)算機(jī),辦公室 - 元件,配件 >> 調(diào)制解調(diào)器 系列:MultiMobile™ USB 標(biāo)準(zhǔn)包裝:1 系列:MultiModem® ZBA 數(shù)據(jù)格式:V.34,V.92 波特率:- 電源電壓:- 安裝類型:臺(tái)式 封裝/外殼:5.7" L x 4.3" W x 1.0" H(145mm x 109mm x 25mm) 供應(yīng)商設(shè)備封裝:- 包裝:散裝
MT9234MU-CDC-CP 功能描述:MODEM V.92 DATA/FAX USB WORLD 25 RoHS:是 類別:計(jì)算機(jī),辦公室 - 元件,配件 >> 調(diào)制解調(diào)器 系列:MultiMobile™ USB 標(biāo)準(zhǔn)包裝:1 系列:MultiModem® ZBA 數(shù)據(jù)格式:V.34,V.92 波特率:- 電源電壓:- 安裝類型:臺(tái)式 封裝/外殼:5.7" L x 4.3" W x 1.0" H(145mm x 109mm x 25mm) 供應(yīng)商設(shè)備封裝:- 包裝:散裝
MT9234MU-CDC-XR 功能描述:MODEM V.92 DATA/FAX USB WORLD RoHS:是 類別:計(jì)算機(jī),辦公室 - 元件,配件 >> 調(diào)制解調(diào)器 系列:MultiMobile™ USB 標(biāo)準(zhǔn)包裝:1 系列:MultiModem® ZBA 數(shù)據(jù)格式:V.34,V.92 波特率:- 電源電壓:- 安裝類型:臺(tái)式 封裝/外殼:5.7" L x 4.3" W x 1.0" H(145mm x 109mm x 25mm) 供應(yīng)商設(shè)備封裝:- 包裝:散裝