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參數(shù)資料
| 型號(hào)： | P89LPC9402FBD,557 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 31/60頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC 80C51 MCU FLASH 8K 64-LQFP |
| 標(biāo)準(zhǔn)包裝： | 450 |
| 系列： | LPC900 |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 18MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，LCD，LED，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 23 |
| 程序存儲(chǔ)器容量： | 8KB（8K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.4 V ~ 3.6 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 64-LQFP |
| 包裝： | 托盤 |
| 其它名稱： | 935288631557 |
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P89LPC9402_1
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 22 April 2009
37 of 60
NXP Semiconductors
P89LPC9402
8-bit microcontroller with accelerated two-clock 80C51 core
7.25 Watchdog timer
The watchdog timer causes a system reset when it underows as a result of a failure to
feed the timer prior to the timer reaching its terminal count. It consists of a programmable
12-bit prescaler, and an 8-bit down counter. The down counter is decremented by a tap
taken from the prescaler. The clock source for the prescaler can be the PCLK, the nominal
400 kHz watchdog oscillator or crystal oscillator. The watchdog timer can only be reset by
a power-on reset. When the watchdog feature is disabled, it can be used as an interval
timer and may generate an interrupt. Figure 16 shows the watchdog timer in Watchdog
mode. Feeding the watchdog requires a two-byte sequence. If PCLK is selected as the
watchdog clock and the CPU is powered down, the watchdog is disabled. The watchdog
timer has a time-out period that ranges from a few
s to a few seconds. Please refer to the
P89LPC9402
User manual for more details.
7.26 Additional features
7.26.1 Software reset
The SRST bit in AUXR1 gives software the opportunity to reset the processor completely,
as if an external reset or watchdog reset had occurred. Care should be taken when writing
to AUXR1 to avoid accidental software resets.
7.26.2 Dual data pointers
The dual Data Pointers (DPTR) provides two different Data Pointers to specify the address
used with certain instructions. The DPS bit in the AUXR1 register selects one of the two
Data Pointers. Bit 2 of AUXR1 is permanently wired as a logic 0 so that the DPS bit may
be toggled (thereby switching Data Pointers) simply by incrementing the AUXR1 register,
without the possibility of inadvertently altering other bits in the register.
(1) Watchdog reset can also be caused by an invalid feed sequence, or by writing to WDCON not immediately followed by a feed
sequence.
Fig 16. Watchdog timer in Watchdog mode (WDTE = 1)
PRE2
PRE1
PRE0
-
WDRUN
WDTOF
WDCLK
WDCON (A7H)
SHADOW REGISTER
PRESCALER
002aae015
8-BIT DOWN
COUNTER
WDL (C1H)
watchdog
oscillator
crystal
oscillator
PCLK
XTALWD
÷32
0
1
0
1
MOV WFEED1, #0A5H
MOV WFEED2, #05AH
reset(1)
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| P89LPC9408 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with two-clock 80C51 core 8 kB 3 V byte-erasable flash, 32 segment x 4 LCD driver, 10-bit ADC |
| P89LPC9408FBD | 功能描述:8位微控制器 -MCU 8K FL/10B ADC LCD DRIVER RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P89LPC9408FBD,557 | 功能描述:8位微控制器 -MCU 8K FL/10B ADC LCD RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P89LPC9408FBD557 | 制造商:NXP Semiconductors 功能描述:P89LPC9408FBD/LQFP64/TRAYDPM// |
| P89LPC952 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 10-bit ADC |
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