參數(shù)資料
型號(hào)： P89LPC9402FBD,557
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 36/60頁(yè)
文件大小： 0K
描述： IC 80C51 MCU FLASH 8K 64-LQFP
標(biāo)準(zhǔn)包裝： 450
系列： LPC900
核心處理器： 8051
芯體尺寸： 8-位
速度： 18MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，LCD，LED，POR，PWM，WDT
輸入/輸出數(shù)： 23
程序存儲(chǔ)器容量： 8KB（8K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 2.4 V ~ 3.6 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-LQFP
包裝： 托盤(pán)
其它名稱： 935288631557
P89LPC9402_1
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 22 April 2009
41 of 60
NXP Semiconductors
P89LPC9402
8-bit microcontroller with accelerated two-clock 80C51 core
7.28 Flash program memory
7.28.1 General description
The P89LPC9402 ash memory provides in-circuit electrical erasure and programming.
The ash can be erased, read, and written as bytes. The Sector and Page Erase functions
can erase any ash sector (1 kB) or page (64 bytes). The Chip Erase operation will erase
the entire program memory. ICP using standard commercial programmers is available. In
addition, IAP and byte-erase allows code memory to be used for non-volatile data storage.
On-chip erase and write timing generation contribute to a user-friendly programming
interface. The P89LPC9402 ash reliably stores memory contents even after
100,000 erase and program cycles. The cell is designed to optimize the erase and
programming mechanisms. The P89LPC9402 uses VDD as the supply voltage to perform
the Program/Erase algorithms. When voltage supply is lower than 2.4 V, the BOD FLASH
is tripped and ash erase/program is blocked.
7.28.2 Features
Programming and erase over the full operating voltage range.
Byte erase allows code memory to be used for data storage.
Read/Programming/Erase using ISP/IAP/ICP.
Internal xed boot ROM, containing low-level IAP routines available to user code.
Default loader providing ISP via the serial port, located in upper end of user program
memory.
Boot vector allows user-provided ash loader code to reside anywhere in the ash
memory space, providing exibility to the user.
Any ash program or erase operation in 2 ms.
Programming with industry-standard commercial programmers.
Programmable security for the code in the ash for each sector.
100,000 typical erase/program cycles for each byte.
10 year minimum data retention.
7.28.3 Flash organization
The program memory consists of eight 1 kB sectors on the P89LPC9402 device. Each
sector can be further divided into 64-byte pages. In addition to sector erase, page erase,
and byte erase, a 64-byte page register is included which allows from 1 byte to 64 bytes of
a given page to be programmed at the same time, substantially reducing overall
programming time.
7.28.4 Using ash as data storage
The ash code memory array of this device supports individual byte erasing and
programming. Any byte in the code memory array may be read using the MOVC
instruction, provided that the sector containing the byte has not been secured (a MOVC
instruction is not allowed to read code memory contents of a secured sector). Thus any
byte in a non-secured sector may be used for non-volatile data storage.
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