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參數(shù)資料
| 型號(hào)： | P89V52X2FN,112 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 55/57頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC 80C51 MCU FLASH 8K 40-DIP |
| 產(chǎn)品培訓(xùn)模塊： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 標(biāo)準(zhǔn)包裝： | 216 |
| 系列： | 89V |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | UART/USART |
| 外圍設(shè)備： | POR |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲(chǔ)器容量： | 8KB（8K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| EEPROM 大?。?/td> | 192 x 8 |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 40-DIP（0.600"，15.24mm） |
| 包裝： | 管件 |
| 配用： | 622-1017-ND - BOARD 44-ZIF PLCC SOCKET 622-1012-ND - BOARD FOR P89V52X2 44-TQFP 622-1008-ND - BOARD FOR LPC9103 10-HVSON |
| 其它名稱： | 568-4251-5 935282526112 P89V52X2FN |
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P89V52X2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 4 May 2009
7 of 57
NXP Semiconductors
P89V52X2
80C51 with 256 B RAM, 192 B data EEPROM
[1]
ALE loading issue: When ALE pin experiences higher loading (> 30 pF) during the reset, the microcontroller may accidentally enter into
modes other than normal working mode. The solution is to add a pull-up resistor of 3 k
to 50 k to V
DD, e.g., for ALE pin.
[2]
For 6-clock mode, ALE is emitted at 1
3 of crystal frequency.
P3[5]/T1
15
11
17
I/O
P3[5] — Port 3 bit 5.
I
T1 — External count input to Timer/Counter 1
P3[6]/WR
16
12
18
O
P3[6] — Port 3 bit 6.
O
WR — External data memory write strobe
P3[7]/RD
17
13
19
O
P3[7] — Port 3 bit 7.
O
RD — External data memory read strobe.
PSEN
29
26
32
I/O
Program Store Enable: PSEN is the read strobe for
external program memory. When the device is executing
from internal program memory, PSEN is inactive (HIGH).
When the device is executing code from external program
memory, PSEN is activated twice each machine cycle,
except that two PSEN activations are skipped during each
access to external data memory.
RST
9
4
10
I
Reset: While the oscillator is running, a HIGH logic state
on this pin for two machine cycles will reset the device.
EA
31
29
35
I
External Access Enable: EA must be connected to VSS in
order to enable the device to fetch code from the external
program memory. EA must be strapped to VDD for internal
program execution.
ALE
30
27
33
I/O
Address Latch Enable: ALE is the output signal for
latching the low byte of the address during an access to
external memory. Normally the ALE[1] is emitted at a
constant rate of 1
6 the crystal frequency[2] and can be
used for external timing and clocking. One ALE pulse is
skipped during each access to external data memory.
However, if AO is set to ‘1’, ALE is disabled.
XTAL1
19
15
21
I
Crystal 1: Input to the inverting oscillator amplier and
input to the internal clock generator circuits.
XTAL2
18
14
20
O
Crystal 2: Output from the inverting oscillator amplier.
VDD
40
38
44
I
Power supply
VSS
20
16
22
I
Ground
Table 2.
Pin description …continued
Symbol
Pin
Type
Description
DIP40
LQFP44
PLCC44
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| P89V660 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI |
| P89V660_08 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI |
| P89V660_0811 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI |
| P89V660FA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI |
| P89V660FA,512 | 功能描述:8位微控制器 -MCU 80C51 16K FL / 512 R RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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