參數(shù)資料
型號(hào): P89V52X2FN,112
廠商: NXP Semiconductors
文件頁數(shù): 56/57頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 40-DIP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 216
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: UART/USART
外圍設(shè)備: POR
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大小: 192 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
配用: 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
622-1012-ND - BOARD FOR P89V52X2 44-TQFP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
其它名稱: 568-4251-5
935282526112
P89V52X2FN
P89V52X2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 4 May 2009
8 of 57
NXP Semiconductors
P89V52X2
80C51 with 256 B RAM, 192 B data EEPROM
6.
Functional description
6.1 Special function registers
Remark: SFR accesses are restricted in the following ways:
User must not attempt to access any SFR locations not dened.
Accesses to any dened SFR locations must be strictly for the functions for the SFRs.
SFR bits labeled ‘-’, ‘0’ or ‘1’ can only be written and read as follows:
‘-’ Unless otherwise specied, must be written with ‘0’, but can return any value
when read (even if it was written with ‘0’). It is a reserved bit and may be used in
future derivatives.
‘0’ must be written with ‘0’, and will return a ‘0’ when read.
‘1’ must be written with ‘1’, and will return a ‘1’ when read.
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