參數(shù)資料
型號: PCI1510ZVF
廠商: Texas Instruments, Inc.
英文描述: PC CARD CONTROLLERS
中文描述: PC卡控制器
文件頁數(shù): 33/128頁
文件大?。?/td> 735K
代理商: PCI1510ZVF
219
Table 211. Multifunction and Miscellaneous Terminals
TERMINAL
NAME
NUMBER
GGU
I/O
DESCRIPTION
PGE
GVF
CLK_48_RSVD
85
H10
No connect. These terminals have no connection anywhere within the package.
Terminals H10 on the GGU package and 85 on the PGE package will be used as a
48-MHz clock input on future-generation devices.
MFUNC0
58
K07
F05
I/O
Multifunction terminal 0. MFUNC0 can be configured as parallel PCI interrupt INTA,
GPI0, GPO0, socket activity LED output, ZV switching output, CardBus audio PWM,
GPE, or a parallel IRQ. See Section 4.30,
Multifunction Routing Register
, for
configuration details.
MFUNC1
59
N09
G06
I/O
Multifunction terminal 1. MFUNC1 can be configured as GPI1, GPO1, socket activity
LED output, D3_STAT, ZV switching output, CardBus audio PWM, GPE, or a parallel
IRQ. See Section 4.30,
Multifunction Routing Register
, for configuration details.
Serial data (SDA). When VCCD0 and VCCD1 are detected high after a global reset, the
MFUNC1 terminal provides the SDA signaling for the serial bus interface. The
two-terminal serial interface loads the subsystem identification and other register
defaults from an EEPROM after a global reset. See Section 3.6.1,
Serial Bus Interface
Implementation
, for details on other serial bus applications.
MFUNC2
63
L09
F03
I/O
Multifunction terminal 2. MFUNC2 can be configured as GPI2, GPO2, socket activity
LED output, ZV switching output, CardBus audio PWM, GPE, RI_OUT, D3_STAT, or a
parallel IRQ. See Section 4.30,
Multifunction Routing Register
, for configuration details.
MFUNC3/
IRQSER
64
K10
F02
I/O
Multifunction terminal 3. MFUNC3 can be configured as a parallel IRQ or the serialized
interrupt signal IRQSER. This terminal is IRQSER by default. See Section 4.30,
Multifunction Routing Register
, for configuration details.
MFUNC4
67
M10
G05
I/O
Multifunction terminal 4. MFUNC4 can be configured as PCI LOCK, GPI3, GPO3, socket
activity LED output, ZV switching output, CardBus audio PWM, GPE, D3_STAT,
RI_OUT, or a parallel IRQ. See Section 4.30,
Multifunction Routing Register
, for
configuration details.
Serial clock (SCL). When VCCD0 and VCCD1 are detected high after a global reset, the
MFUNC4 terminal provides the SCL signaling for the serial bus interface. The
two-terminal serial interface loads the subsystem identification and other register
defaults from an EEPROM after a global reset. See Section 3.6.1,
Serial Bus Interface
Implementation
, for details on other serial bus applications.
MFUNC5
68
N12
F01
I/O
Multifunction terminal 5. MFUNC5 can be configured as GPI4, GPO4, socket activity
LED output, ZV switching output, CardBus audio PWM, D3_STAT, GPE, or a parallel
IRQ. See Section 4.30,
Multifunction Routing Register
, for configuration details.
MFUNC6/
CLKRUN
69
L10
H06
I/O
Multifunction terminal 6. MFUNC6 can be configured as a PCI CLKRUN or a parallel
IRQ. See Section 4.30,
Multifunction Routing Register
, for configuration details.
RI_OUT / PME
57
M08
J03
O
Ring indicate out and power management event output. Terminal provides an output for
ring- indicate or PME signals.
SPKROUT
61
M09
E02
O
Speaker output. SPKROUT is the output to the host system that can carry SPKR or
CAUDIO through the controller from the PC Card interface. SPKROUT is driven as the
exclusive-OR combination of card SPKR//CAUDIO inputs.
SUSPEND
65
N10
G03
I
Suspend. SUSPEND protects the internal registers from clearing when the GRST or
PRST signal is asserted. See Section 3.8.5,
Suspend Mode
, for details.
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