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| 型號(hào)： | PCI1510ZVF |
| 廠(chǎng)商： | Texas Instruments, Inc. |
| 英文描述： | PC CARD CONTROLLERS |
| 中文描述： | PC卡控制器 |
| 文件頁(yè)數(shù)： | 63/128頁(yè) |
| 文件大小： | 735K |
| 代理商： | PCI1510ZVF |
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43
4.4
Command Register
The command register provides control over the controller interface to the PCI bus. All bit functions adhere to the
definitions in
PCI Local Bus Specification
. See Table 43 for a complete description of the register contents.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
Command
04h
Read-only, Read/Write
0000h
Table 43. Command Register Description
BIT
SIGNAL
TYPE
FUNCTION
1510
RSVD
R
Reserved. Bits 1510 return 00 0000b when read.
9
FBB_EN
R
Fast back-to-back enable. The controller does not generate fast back-to-back transactions; therefore, bit 9
returns 0b when read.
8
SERR_EN
RW
System error (SERR) enable. Bit 8 controls the enable for the SERR driver on the PCI interface. SERR can
be asserted after detecting an address parity error on the PCI bus. Both bits 8 and 6 must be set for the
controller to report address parity errors.
0 = Disable SERR output driver (default)
1 = Enable SERR output driver
7
STEP_EN
R
Address/data stepping control. The controller does not support address/data stepping; therefore, bit 7 is
hardwired to 0b.
6
PERR_EN
RW
Parity error response enable. Bit 6 controls the controller response to parity errors through PERR. Data
parity errors are indicated by asserting PERR, whereas address parity errors are indicated by asserting
SERR.
0 = The controller ignores detected parity error (default)
1 = The controller responds to detected parity errors
5
VGA_EN
RW
VGA palette snoop. Bit 5 controls how PCI devices handle accesses to video graphics array (VGA) palette
registers.
4
MWI_EN
R
Memory write-and-invalidate enable. Bit 4 controls whether a PCI initiator device can generate memory
write-and-Invalidate commands. The controller does not support memory write-and-invalidate commands,
but uses memory write commands instead; therefore, this bit is hardwired to 0b.
3
SPECIAL
R
Special cycles. Bit 3 controls whether or not a PCI device ignores PCI special cycles. The controller does
not respond to special cycle operations; therefore, this bit is hardwired to 0b.
2
MAST_EN
RW
Bus master control. Bit 2 controls whether or not the controller can act as a PCI bus initiator (master). The
controller can take control of the PCI bus only when this bit is set.
0 = Disables the controller from generating PCI bus accesses (default)
1 = Enables the controller to generate PCI bus accesses
1
MEM_EN
RW
Memory space enable. Bit 1 controls whether or not the controller can claim cycles in PCI memory space.
0 = Disables the controller from responding to memory space accesses (default)
1 = Enables the controller to respond to memory space accesses
0
IO_EN
RW
I/O space control. Bit 0 controls whether or not the controller can claim cycles in PCI I/O space.
0 = Disables the controller from responding to I/O space accesses (default)
1 = Enables the controller to respond to I/O space accesses
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCI1512 | 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:CardBus Controller |
| PCI1512GVF | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Single Slot PC CardBus Controller RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PCI1512ZVF | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Single Slot PC CardBus Controller RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PCI1515GHK | 功能描述:IC PC CARD CONTROLLER 257-BGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類(lèi)型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱(chēng):Q6396337A |
| PCI1515ZHK | 功能描述:IC PC CARD CONTROLLER 257-BGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類(lèi)型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱(chēng):Q6396337A |
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