參數(shù)資料
      型號: PCI6515
      廠商: Texas Instruments, Inc.
      英文描述: SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
      中文描述: 單插槽CardBus控制器,專用智能卡插槽
      文件頁數(shù): 28/148頁
      文件大?。?/td> 760K
      代理商: PCI6515
      212
      Table 29. Multifunction and Miscellaneous Terminals
      TERMINAL
      I/O
      DESCRIPTION
      NAME
      NUMBER
      A_USB_EN
      E10
      O
      USB enable. This output terminal controls an external CBT switch when an USB
      card is inserted into the socket.
      CLK_48
      F01
      I
      A 48-MHz clock must be connected to this terminal.
      MFUNC0
      G01
      MFUNC1
      H05
      MFUNC2
      H02
      Multifunction terminals 06. See Section 4.35,
      Multifunction Routing Status
      Register
      , for configuration details.
      MFUNC3
      H01
      I/O
      MFUNC4
      J01
      MFUNC5
      J02
      MFUNC6
      J03
      NC
      A02, A03, A06, A07, A08, A17,
      A18, B01, B02, B03, B06, B07,
      B08, B17, B18, B19, C01, C02,
      C03, C04, C07, C08, C16, C17,
      C18, C19, D02, D03, D17, D18,
      E07, E08, E09, F08, N14, P18,
      R13, R18, R19, T03, T17, T18,
      T19, U01, U02, U03, U04, U16,
      U17, V01, V02, V03, V04, V13,
      V14, V15, V16, V17, V18, V19,
      W02, W03, W13, W14, W15,
      W16, W17, W18
      R12
      Reserved. This terminal has no connection anywhere within the package.
      RSVD
      Reserved. This terminal must be tied to ground.
      RI_OUT/
      PME
      L05
      O
      Ring indicate out and power management event output. This terminal provides an
      output for ring-indicate or PME signals.
      SCL
      G02
      I/O
      Serial clock. At PRST, the SCL signal is sampled to determine if a two-wire serial
      ROM is present. If the serial ROM is detected, then this terminal provides the serial
      clock signaling and is implemented as open-drain. For normal operation (a ROM is
      implemented in the design), this terminal must be pulled high to the ROM VDD with
      a 2.7-k
      resistor. Otherwise, it must be pulled low to ground with a 220-
      resistor.
      SDA
      G03
      I/O
      Serial data. If the serial ROM is detected, then this terminal provides the serial data
      signaling and is implemented as open-drain. For normal operation (a ROM is
      implemented in the design), this terminal must be pulled high to the ROM VDD with
      a 2.7-k
      resistor. Otherwise, it must be pulled low to ground with a 220-
      resistor.
      Speaker output. SPKROUT is the output to the host system that can carry SPKR
      or CAUDIO through the controller from the PC Card interface. SPKROUT is driven
      as the exclusive-OR combination of card SPKR//CAUDIO inputs.
      SPKROUT
      H03
      O
      SUSPEND
      J05
      I
      Suspend. SUSPEND protects the internal registers from clearing when the GRST
      or PRST signal is asserted. See Section 3.8.5,
      Suspend Mode
      , for details.
      TEST0
      TEST1
      TEST2
      TEST3
      P12
      U12
      V12
      W12
      I/O
      Terminals TEST0TEST3 are used for factory test of the controller and must be
      connected to ground for normal operation.
      TEST4
      P17
      I/O
      Terminal TEST4 is not for customer use. It must be pulled high with a 4.7-k
      resistor.
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