參數(shù)資料
型號： PDI1394P24
廠商： NXP Semiconductors N.V.
英文描述： 2-port 400 Mbps physical layer interface(2端口 400 Mbps物理層接口)
中文描述： 2端口400 Mbps的物理層接口（2端口400 Mbps的物理層接口）
文件頁數(shù)： 27/39頁
文件大?。?/td> 188K
代理商： PDI1394P24
Philips Semiconductors
Objective specification
PDI1394P24
2-port 400 Mbps physical layer interface
2000 Jun 23
27
The sequence of events for a null packet reception is as follows:
Receive operation initiated. The PHY indicates a receive
operation by asserting receive on the CTL lines. Normally, the
interface is idle when receive is asserted. However, the receive
operation may interrupt a status transfer operation that is in
progress so that the CTL lines may change from status to receive
without an intervening idle.
Data-on indication. The PHY asserts the data-on indication code
on the D lines for one or more cycles.
Receive operation terminated. The PHY terminates the receive
operation by asserting Idle on the CTL lines. The PHY shall assert
at least one cycle of Idle following a receive operation.
SYSCLK
(a)
(b)
CTL0, CTL1
D0–D7
XX
00
00
10
00
01
FF (“data-on”)
SV01761
(c)
Figure 16.
Null Packet Reception Timing
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PDI1394P24BD 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LINE TRANSCEIVER|CMOS|4 DRIVER|4 RCVR|QFP|64PIN|PLASTIC
PDI1394P25 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1-port 400 Mbps physical layer interface
PDI1394P25BD 功能描述:輸入/輸出控制器接口集成電路 1394 1 PORT 400 MB/S PHY RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
PDI1394P25BD,118 制造商:NXP Semiconductors 功能描述:1394 1 PORT 400 MB/S PHY - Tape and Reel
PDI1394P25BD,151 制造商:NXP Semiconductors 功能描述:1394 1 PORT 400 MB/S PHY - Trays
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