Pentium
II Processor – Low-Power Module
Datasheet
29
4.5
Module Signal Termination
System design requirements for signal termination for the module have been split between the
processor module and the system electronics. The system designer is responsible for ensuring
proper termination on the signals.
4.6
Processor Core Voltage Regulation
The module’s DC voltage regulator (DC/DC converter) is designed to support the core voltage and
I/O ring voltage for current and future processors. The DC voltage regulator provides the
appropriate processor core voltage, the processor sideband signal pull-up voltage, and the I/O
voltage for the components on the processor core backside bus. Of these voltages, only the
processor sideband pull-up voltage (V_CPUPU) is delivered to the system electronics.
The module supports an input DC voltage range of 5 V - 21 V from the system battery, or power
supply.
4.6.1
Voltage Regulator Efficiency
There are three voltage regulators on the module. These voltage regulators generate the core
voltage used by the CPU, the voltage for the backside bus, and the voltage for the CPU I/O ring
voltage. The core voltage regulator provides the required current from the V_DC (battery or A/C
voltage adapter) supply. Its relative efficiencies are shown in Table 18. The backside bus I/O and
CPU I/O ring voltage regulators tap the V_3 plane and are about 85 percent efficient at typical
loads.
Table 18. Typical Voltage Regulator Efficiency
Icore, A
3
V_DC, V
I_DC, A
2
Efficiency
1
V_DC, V
I_DC
2
Efficiency
1
1
5.00
0.394
83%
18.00
0.135
68%
2
5.00
0.752
88%
18.00
0.233
80%
3
5.00
1.212
82%
18.00
0.340
82%
4
5.00
1.506
88%
18.00
0.451
82%
5
5.00
1.921
86%
18.00
0.561
82%
6
5.00
2.290
86%
18.00
0.674
82%
7
5.00
2.683
85%
18.00
0.790
81%
1
12.00
0.186
74%
21.00
0.129
62%
2
12.00
0.335
83%
21.00
0.215
74%
3
12.00
0.491
85%
21.00
0.304
79%
4
12.00
0.652
85%
21.00
0.396
81%
5
12.00
0.816
85%
21.00
0.493
81%
6
12.00
0.980
84%
21.00
0.592
80%
7
12.00
1.149
83%
21.00
0.692
80%
NOTES:
1. These efficiencies will change with future voltage regulators that accommodate wider ranges of input
voltages.
2. With V_DC applied and the voltage regulator off, typical leakage is 0.3 mA with a maximum of 0.7 mA.
3. Icore indicates the processor core current being drawn during test and measurement.