INTEL PENTIUM PROCESSOR WITH MMX TECHNOLOGY MOBILE MODULE
E
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9/19/97 1:03 PM SPEIDEN_.DOC
Table 12. Typical Voltage Regulator Efficiency
Vin
Iin
V_5
I_5
VCORE, V
ICORE, A
VI/O, V
I_I/O, A
Eff., %
5
0.429
10
0.01
1.81
1
2.55
0.052
86.61
5
0.845
10
0.01
1.81
2
2.55
0.052
86.82
5
1.293
10
0.01
1.81
3
2.55
0.052
84.75
5
1.776
10
0.01
1.81
4
2.55
0.052
82.05
12
0.187
10
0.01
1.82
1
2.55
0.052
83.29
12
0.356
10
0.01
1.82
2
2.55
0.052
86.29
12
0.54
10
0.01
1.82
3
2.55
0.052
85.02
12
0.737
10
0.01
1.82
4
2.55
0.052
82.95
18
0.128
10
0.01
1.83
1
2.55
0.052
81.52
18
0.244
10
0.01
1.83
2
2.55
0.052
84.30
18
0.367
10
0.01
1.83
3
2.55
0.052
83.80
18
0.5
10
0.01
1.83
4
2.56
0.052
81.98
NOTES:
1.
The above measured efficiencies were measured on a sample size of one unit. Results may vary across
different modules.
These efficiencies will change with future voltage regulators that accommodate higher input voltages.
2.
3.4.2.
VOLTAGE REGULATOR CONTROL
The VR_ON pin on the connector allows a digital
signal (3.3V, 5V safe) to control the voltage
regulator. The system manufacturer can use this
signal to turn the
Intel Mobile Module’s voltage
regulator on or off. VR_ON should be controlled
with the same digital control signal used to control
the system’s switched 5V/3.3V power planes. The
PIIX4 South Bridge defines Suspend B as the
power management state in which power is
physically removed from the processor, L2 cache,
430TX PCIset, and voltage regulator. In this state,
the SUSB# pin on the PIIX4 ISA bridge controls
these power planes.
From the assertion of VR_ON, the voltage
regulator
has
a
turn-on
approximately 6ms. In order to bring both the
processor’s core and I/O ring voltages up together,
the system manufacturer must ensure that the
system’s switched 3.3V supply (voltage plane
V_3S) turns on and off with the Intel Mobile
Module’s core voltage. This requires properly
sequencing of the system’s voltage regulator and
the VR_ON signal. See power sequencing diagram
in section 3.4.3.
time
latency
of