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參數(shù)資料
| 型號： | PH28F640L18T85 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | StrataFlash Wireless Memory |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 85 ns, PBGA56 |
| 封裝： | 0.75 MM PITCH, LEAD FREE, VFBGA-56 |
| 文件頁數(shù)： | 92/106頁 |
| 文件大?。?/td> | 1272K |
| 代理商： | PH28F640L18T85 |
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Intel StrataFlash Wireless Memory (L18)
April 2005
92
Intel StrataFlash Wireless Memory (L18)
Order Number: 251902, Revision: 009
Datasheet
Figure 46.
Protection Register Programming Flowchart
FULL STATUS CHECK PROCEDURE
Program Protection Register operation addresses must be
within the Protection Register address space. Addresses
outside this space will return an error.
Repeat for subsequent programming operations.
Full Status Register check can be done after each program, or
after a sequence of program operations.
Write 0xFF after the last operation to set Read Array state.
Only the Clear Staus Register command clears SR[1, 3, 4].
If an error is detected, clear the Status register before
attempting a program retry or other error recovery.
1
0
1
1
1
PROTECTION REGISTER PROGRAMMING PROCEDURE
Start
Write 0xC0,
PR Address
Write PR
Address & Data
Read Status
Register
SR[7] =
Full Status
Check
(if desired)
Program
Complete
Read Status
Register Data
Program
Successful
SR[3] =
SR[4] =
SR[1] =
V
PP
Range Error
Program Error
Register Locked;
Program Aborted
Idle
Idle
Bus
Operation
None
None
Command
Check SR[3]:
1 =V
PP
Range Error
Check SR[4]:
1 =Programming Error
Comments
Write
Write
Idle
Program
PR Setup
Protection
Program
None
Data = 0xC0
Addr = First Location to Program
Data = Data to Program
Addr = Location to Program
Check SR[7]:
1 = WSM Ready
0 = WSM Busy
OpBus
Comments
Read
None
Status Register Data.
Idle
None
Check SR[1]:
1 =Block locked; operation aborted
(Program Setup)
(Confirm Data)
0
0
0
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| PH28F640W18BD60 | 制造商:Micron Technology Inc 功能描述:PH28F640W18BD60S L785 |
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