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參數(shù)資料
| 型號(hào)： | PHB55N03T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | TrenchMOS transistor Standard level FET |
| 中文描述： | 55 A, 30 V, 0.018 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | PLASTIC PACKAGE-3 |
| 文件頁(yè)數(shù)： | 9/11頁(yè) |
| 文件大?。?/td> | 117K |
| 代理商： | PHB55N03T |
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
Logic level FET
PHP55N04LT, PHB55N04LT
PHD55N04LT
MECHANICAL DATA
Fig.18. SOT428 surface mounting package. Centre pin connected to mounting base.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8".
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
SOT428
TO-252
SC-63
99-09-13
01-12-11
0
10
20 mm
scale
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads
(one lead cropped)
SOT428
E
b2
E1
w
A
M
b
c
b1
L1
L
1
3
2
D
D1
HE
L2
Note
1. Measured from heatsink back to lead.
e1
e
A
A2
A
A1
y
seating plane
mounting
base
A1
(1)
D
b
E1
E
HE
w
y
max.
A2
b2
b1
c
D1
min.
e
e1
L1
min.
L2
L
A
UNIT
DIMENSIONS (mm are the original dimensions)
0.2
0.2
mm
2.38
2.22
0.65
0.45
0.93
0.73
0.89
0.71
1.1
0.9
5.46
5.26
0.4
0.2
6.22
5.98
4.81
4.45
2.285
4.57
10.4
9.6
0.5
0.9
0.5
6.73
6.47
4.0
2.95
2.55
January 2001
9
Rev 1.000
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