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參數(shù)資料
| 型號(hào)： | PHN70308/T3 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | 5000 mA, 25 V, 7 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, MO-150AH |
| 封裝： | PLASTIC, SSOP-28 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 132K |
| 代理商： | PHN70308/T3 |
Philips Semiconductors
Product specification
N-channel enhancement mode
PHN70308
TrenchMOS transistor array
SOURCE-DRAIN DIODE LIMITING VALUES AND CHARACTERISTICS
T
j = 25C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
I
F
Continuous forward diode
T
sp = 50 C
current
spindle FET;
δ = 33.3%
-
5
A
isolation FET
-
5
A
I
FRM
Repetitive peak forward diode
spindle FET
-
20
A
current
isolation FET
-
20
A
V
F
Diode forward voltage
I
F = 1.25 A; VGS = 0 V
spindle FET
-
0.8
1
V
isolation FET
-
0.8
1
V
t
rr
Reverse recovery time
I
F = 1.25 A; -dIF/dt = 100 A/s;
V
DS = 25 V
spindle FET
-
20
-
ns
isolation FET
-
25
-
ns
Fig.1. Normalised power dissipation.
PD% = 100
P
D/PD 25 C = f(Tsp)
Fig.2. Normalised continuous drain current.
ID% = 100
I
D/ID 25 C = f(Tsp); conditions: VGS ≥ 10 V
Fig.3. Normalised drain-source on-state resistance.
R
DS(ON)/RDS(ON)25 C = f(Tj)
Fig.4. Gate threshold voltage.
V
GS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
Normalised Power Derating, Ptot (%)
0
10
20
30
40
50
60
70
80
90
100
0
20
40
60
80
100
120
140
160
Solder Point temperature, Tsp (C)
Normalised On-state Resistance
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
-60
-40
-20
0
20
40
60
80
100
120
140
160
180
Junction temperature, Tj (C)
Normalised Current Derating, ID (%)
0
20
40
60
80
100
120
0
20
40
60
80
100
120
140
160
Solder Point temperature, Tsp (C)
Threshold Voltage, VGS(TO) (V)
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
2.75
3
-60
-40
-20
0
20
40
60
80
100
120
140
160
180
Junction Temperature, Tj (C)
typical
minimum
May 1999
4
Rev 1.000
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