- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3887 > PIC16F688-I/SL (Microchip Technology)IC PIC MCU FLASH 4KX14 14SOIC PDF資料下載
參數(shù)資料
| 型號： | PIC16F688-I/SL |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 32/204頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PIC MCU FLASH 4KX14 14SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 標(biāo)準(zhǔn)包裝： | 57 |
| 系列： | PIC® 16F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，WDT |
| 輸入/輸出數(shù)： | 12 |
| 程序存儲器容量： | 7KB（4K x 14） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 256 x 8 |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 639 (CN2011-ZH PDF) |
| 配用： | XLT14SO-1-ND - SOCKET TRANSITION 14SOIC 150/208 AC162061-ND - HEADER INTRFC MPLAB ICD2 20PIN AC162056-ND - HEADER INTERFACE ICD2 16F688 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁當(dāng)前第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁
2009 Microchip Technology Inc.
DS41203E-page 125
PIC16F688
11.6
Power-Down Mode (Sleep)
The Power-down mode is entered by executing a
SLEEP
instruction.
If the Watchdog Timer is enabled:
WDT will be cleared but keeps running.
PD bit in the Status register is cleared.
TO bit is set.
Oscillator driver is turned off.
I/O ports maintain the status they had before SLEEP
was executed (driving high, low or high-impedance).
For lowest current consumption in this mode, all I/O
pins should be either at VDD or VSS, with no external
circuitry drawing current from the I/O pin, and the
comparators and CVREF should be disabled. I/O pins
that are high-impedance inputs should be pulled high
or low externally to avoid switching currents caused by
floating inputs. The T0CKI input should also be at VDD
or
VSS
for
lowest
current
consumption.
The
contribution from on-chip pull-ups on PORTA should be
considered.
The MCLR pin must be at a logic high level.
11.6.1
WAKE-UP FROM SLEEP
The device can wake-up from Sleep through one of the
following events:
1.
External Reset input on MCLR pin.
2.
Watchdog
Timer
wake-up
(if
WDT
was
enabled).
3.
Interrupt from RA2/INT pin, PORTA change or a
peripheral interrupt.
The first event will cause a device Reset. The two latter
events are considered a continuation of program
execution. The TO and PD bits in the Status register
can be used to determine the cause of device Reset.
The PD bit, which is set on power-up, is cleared when
Sleep is invoked. TO bit is cleared if WDT wake-up
occurred.
The following peripheral interrupts can wake the device
from Sleep:
1.
Timer1 interrupt. Timer1 must be operating as
an asynchronous counter.
2.
A/D conversion (when A/D clock source is FRC).
3.
EEPROM write operation completion.
4.
Comparator output changes state.
5.
Interrupt-on-change.
6.
External Interrupt from INT pin.
7.
EUSART Receive Interrupt.
8.
ULPWU Interrupt.
Other peripherals cannot generate interrupts since
during Sleep, no on-chip clocks are present.
When the SLEEP instruction is being executed, the next
instruction (PC + 1) is prefetched. For the device to
wake-up through an interrupt event, the corresponding
interrupt enable bit must be set (enabled). Wake-up is
regardless of the state of the GIE bit. If the GIE bit is
clear (disabled), the device continues execution at the
instruction after the SLEEP instruction. If the GIE bit is
set (enabled), the device executes the instruction after
the SLEEP instruction, then branches to the interrupt
address (0004h). In cases where the execution of the
instruction following SLEEP is not desirable, the user
should have a NOP after the SLEEP instruction.
The WDT is cleared when the device wakes up from
Sleep, regardless of the source of wake-up.
11.6.2
WAKE-UP USING INTERRUPTS
When global interrupts are disabled (GIE cleared) and
any interrupt source has both its interrupt enable bit
and interrupt flag bit set, one of the following will occur:
If the interrupt occurs before the execution of a
SLEEP
instruction, the SLEEP instruction will
complete as a NOP. Therefore, the WDT and WDT
prescaler and postscaler (if enabled) will not be
cleared, the TO bit will not be set and the PD bit
will not be cleared.
If the interrupt occurs during or after the
execution of a SLEEP instruction, the device will
immediately wake-up from Sleep. The SLEEP
instruction will be completely executed before the
wake-up. Therefore, the WDT and WDT prescaler
and postscaler (if enabled) will be cleared, the TO
bit will be set and the PD bit will be cleared.
Even if the flag bits were checked before executing a
SLEEP
instruction, it may be possible for flag bits to
become set before the SLEEP instruction completes.
To determine whether a SLEEP instruction executed,
test the PD bit. If the PD bit is set, the SLEEP instruction
was executed as a NOP.
To ensure that the WDT is cleared, a CLRWDT instruction
should be executed before a SLEEP instruction.
Note:
It should be noted that a Reset generated
by a WDT time-out does not drive MCLR
pin low.
Note:
If the global interrupts are disabled (GIE is
cleared), but any interrupt source has both
its interrupt enable bit and the correspond-
ing interrupt flag bits set, the device will
immediately wake-up from Sleep. The
SLEEP
instruction is completely executed.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 22-02-3213 | CONN FFC/FPC VERTICAL 21POS .100 |
| 22-15-3193 | CONN FFC/FPC 19POS .100 RT ANG |
| PIC16C433T-E/SO | IC MCU CMOS 8BIT 10MHZ 2K 18SOIC |
| 22-02-3103 | CONN FFC/FPC VERTICAL 10POS .100 |
| PIC16C432T-E/SS | IC MCU CMOS 8BIT 20MHZ 2K 20SSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PIC16F688IST | 制造商:MICROCHIP 功能描述:New |
| PIC16F688T-E/SL | 功能描述:8位微控制器 -MCU 7KB 256 RAM 12 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC16F688T-E/ST | 功能描述:8位微控制器 -MCU 7KB 256 RAM 12 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC16F688T-E/ST VAO | 制造商:Microchip Technology Inc 功能描述: |
| PIC16F688T-I/ML | 功能描述:8位微控制器 -MCU 7KB 256 RAM 12I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。