
PIC16F7X
DS30325A-page 160
Advance Information
2000 Microchip Technology Inc.
F
Firmware Instructions .......................................................111
FSR Register ....................................................15, 16, 17, 27
I
I/O Ports .............................................................................29
I
2
C
Addressing .................................................................68
Block Diagram ............................................................67
I
2
C Operation .............................................................67
Master Mode ..............................................................71
Mode ..........................................................................67
Mode Selection ..........................................................67
Multi-Master Mode .....................................................71
Reception ...................................................................69
Reception Timing Diagram ........................................69
SCL and SDA pins .....................................................67
Slave Mode ................................................................67
Transmission ..............................................................70
I
2
C (SSP Module)
Timing Diagram, Data ..............................................141
Timing Diagram, Start/Stop Bits ...............................140
ID Locations ...............................................................95, 110
In-Circuit Serial Programming (ICSP) ........................95, 110
INDF ...................................................................................17
INDF Register ........................................................15, 16, 27
Indirect Addressing ............................................................27
FSR Register .............................................................12
Instruction Format ............................................................111
Instruction Set ..................................................................111
ADDLW ....................................................................113
ADDWF ....................................................................113
ANDLW ....................................................................113
ANDWF ....................................................................113
BCF ..........................................................................113
BSF ..........................................................................113
BTFSC .....................................................................114
BTFSS .....................................................................114
CALL ........................................................................114
CLRF ........................................................................114
CLRW ......................................................................114
CLRWDT ..................................................................114
COMF ......................................................................115
DECF .......................................................................115
DECFSZ ...................................................................115
GOTO ......................................................................115
INCF .........................................................................115
INCFSZ ....................................................................115
IORLW .....................................................................116
IORWF .....................................................................116
MOVLW ...................................................................116
MOVWF ...................................................................116
NOP .........................................................................116
RETFIE ....................................................................117
RETLW ....................................................................117
RETURN ..................................................................117
RLF ..........................................................................117
RRF ..........................................................................117
SLEEP .....................................................................117
SUBLW ....................................................................118
SUBWF ....................................................................118
SWAPF ....................................................................118
XORLW ....................................................................118
XORWF ....................................................................118
Summary Table ....................................................... 112
INT Interrupt (RB0/INT).
See
Interrupt Sources
INTCON ............................................................................. 17
INTCON Register ............................................................... 20
GIE Bit ....................................................................... 20
INTE Bit ......................................................... 20, 21, 22
INTF Bit ..................................................................... 20
RBIF Bit ......................................................... 20, 21, 31
T0IE Bit ...................................................................... 20
Internal Sampling Switch (Rss) Impedance ....................... 92
Interrupt Sources ....................................................... 95, 105
Block Diagram ......................................................... 105
Interrupt on Change (RB7:RB4 ) ............................... 31
RB0/INT Pin, External ...................................... 7, 8, 106
TMR0 Overflow ........................................................ 106
USART Receive/Transmit Complete ......................... 73
Interrupts
Synchronous Serial Port Interrupt .............................. 22
Interrupts, Context Saving During .................................... 106
Interrupts, Enable Bits
Global Interrupt Enable (GIE Bit) ....................... 20, 105
Interrupt on Change (RB7:RB4) Enable (RBIE Bit) . 106
RB0/INT Enable (INTE Bit) ............................ 20, 21, 22
TMR0 Overflow Enable (T0IE Bit) ............................. 20
Interrupts, Flag Bits
Interrupt on Change (RB7:RB4) Flag (RBIF Bit) . 20, 21,
31, 106
RB0/INT Flag (INTF Bit) ............................................ 20
TMR0 Overflow Flag (T0IF Bit) ................................ 106
K
KeeLoq
Evaluation and Programming Tools ................ 122
L
Loading of PC .................................................................... 26
M
Master Clear (MCLR) ....................................................... 7, 8
MCLR Reset, Normal Operation ................ 99, 101, 102
MCLR Reset, SLEEP ................................. 99, 101, 102
Memory Organization
Data Memory ............................................................. 12
Program Memory ....................................................... 11
MPLAB Integrated Development Environment Software . 119
O
OPCODE Field Descriptions ............................................ 111
OPTION ............................................................................. 17
OPTION_REG Register ..................................................... 19
INTEDG Bit ................................................................ 19
PS2:PS0 Bits ............................................................. 19
PSA Bit ................................................................ 19, 20
RBPU Bit ................................................................... 19
T0CS Bit .................................................................... 19
T0SE Bit .................................................................... 19
OSC1/CLKIN Pin ............................................................. 7, 8
OSC2/CLKOUT Pin ......................................................... 7, 8
Oscillator Configuration ............................................... 95, 97
HS ...................................................................... 97, 101
LP ...................................................................... 97, 101
RC ............................................................... 97, 98, 101
XT ...................................................................... 97, 101
Oscillator, WDT ................................................................ 107
Output of TMR2 ................................................................. 53