參數(shù)資料
型號: PIC16F77
廠商: Microchip Technology Inc.
英文描述: 40-Pin 8-Bit CMOS FLASH Microcontrollers(40腳、8位CMOS 閃速微控制器)
中文描述: 40引腳8位CMOS閃存微控制器(40腳,8位的CMOS閃速微控制器)
文件頁數(shù): 41/170頁
文件大?。?/td> 3150K
代理商: PIC16F77
2000 Microchip Technology Inc.
Advance Information
DS30325A-page 41
PIC16F7X
4.0
READING PROGRAM MEMORY
The FLASH Program Memory is readable during nor-
mal operation over the entire V
DD
range. It is indirectly
addressed through Special Function Registers (SFR).
Up to 14-bit numbers can be stored in memory for use
as calibration parameters, serial numbers, packed 7-bit
ASCII, etc. Executing a program memory location con-
taining data that forms an invalid instruction results in
a
NOP
.
There are five SFRs used to read the program and
memory. These registers are:
PMCON1
PMDATA
PMDATH
PMADR
PMADRH
The program memory allows word reads. Program
memory access allows for checksum calculation and
reading calibration tables.
When interfacing to the program memory block, the
PMDATH:PMDATA registers form a two byte word,
which holds the 14-bit data for reads. The
PMADRH:PMADR registers form a two byte word,
which holds the 13-bit address of the FLASH location
being accessed. These devices can have up to 8K
words of program FLASH, with an address range from
0h to 3FFFh. The unused upper bits in both the
PMDATH and PMADRH registers are not implemented
and read as
0
s
.
4.1
PMADR
The address registers can address up to a maximum of
8K words of program FLASH.
When selecting a program address value, the MSByte
of the address is written to the PMADRH register and
the LSByte is written to the PMADR register. The upper
MSbits of PMADRH must always be clear.
4.2
PMCON1 Register
PMCON1 is the control register for memory accesses.
The control bit RD initiates read operations. This bit
cannot be cleared, only set, in software. It is cleared in
hardware at the completion of the read operation.
REGISTER 4-1:
PMCON1 REGISTER (ADDRESS 18Ch)
R-1
U-0
U-0
U-0
U-x
U-0
U-0
R/S-0
RD
bit 7
bit 0
bit 7
bit 6-1
bit 0
Reserved:
Read as
1
Unimplemented
: Read as '0'
RD
: Read Control bit
1
= Initiates a FLASH read, RD is cleared in hardware. The RD bit can only be set (not cleared)
in software.
0
= Does not initiate a FLASH read
Legend:
R = Readable bit
- n = Value at POR reset
W = Writable bit
1
= Bit is set
U = Unimplemented bit, read as
0
0
= Bit is cleared
x = Bit is unknown
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